| /openbmc/linux/Documentation/devicetree/bindings/power/ |
| H A D | pd-samsung.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/pd-samsung.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
17 - $ref: power-domain.yaml#
22 - samsung,exynos4210-pd
23 - samsung,exynos5433-pd
32 clock-names:
41 "#power-domain-cells":
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| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
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| H A D | exynos3250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
46 bus_dmc: bus-dmc {
47 compatible = "samsung,exynos-bus";
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| H A D | exynos5250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
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| H A D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
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| H A D | exynos4210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC device tree source
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
10 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
15 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
20 #include "exynos4-cpu-thermal.dtsi"
23 compatible = "samsung,exynos4210", "samsung,exynos4";
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
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| H A D | exynos5800.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
20 compatible = "samsung,exynos5800-clock", "syscon";
24 opp-2000000000 {
25 opp-hz = /bits/ 64 <2000000000>;
26 opp-microvolt = <1312500 1312500 1500000>;
27 clock-latency-ns = <140000>;
29 opp-1900000000 {
30 opp-hz = /bits/ 64 <1900000000>;
31 opp-microvolt = <1262500 1262500 1500000>;
32 clock-latency-ns = <140000>;
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| H A D | exynos4x12.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | exynos4210.dtsi | 2 * Samsung's Exynos4210 SoC device tree source
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
6 * Copyright (c) 2010-2011 Linaro Ltd.
9 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
14 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
23 #include "exynos4210-pinctrl.dtsi"
24 #include "exynos4210-pinctrl-uboot.dtsi"
27 compatible = "samsung,exynos4210";
35 pd_lcd1: lcd1-power-domain@10023CA0 {
36 compatible = "samsung,exynos4210-pd";
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| H A D | exynos4x12.dtsi | 21 #include "exynos4x12-pinctrl.dtsi"
22 #include "exynos4x12-pinctrl-uboot.dtsi"
32 pd_isp: isp-power-domain@10023CA0 {
33 compatible = "samsung,exynos4210-pd";
37 clock: clock-controller@10030000 {
38 compatible = "samsung,exynos4412-clock";
40 #clock-cells = <1>;
44 compatible = "samsung,exynos4412-mct";
46 interrupt-parent = <&mct_map>;
49 clock-names = "fin_pll", "mct";
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| /openbmc/linux/drivers/pmdomain/samsung/ |
| H A D | exynos-pm-domains.c | 1 // SPDX-License-Identifier: GPL-2.0
9 // conjunction with runtime-pm. Support for both device-tree and non-device-tree
32 struct generic_pm_domain pd; member
38 struct exynos_pm_domain *pd; in exynos_pd_power() local
43 pd = container_of(domain, struct exynos_pm_domain, pd); in exynos_pd_power()
44 base = pd->base; in exynos_pd_power()
46 pwr = power_on ? pd->local_pwr_cfg : 0; in exynos_pd_power()
52 while ((readl_relaxed(base + 0x4) & pd->local_pwr_cfg) != pwr) { in exynos_pd_power()
55 pr_err("Power domain %s %s failed\n", domain->name, op); in exynos_pd_power()
56 return -ETIMEDOUT; in exynos_pd_power()
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5-subcmu.c | 1 // SPDX-License-Identifier: GPL-2.0
5 // Common Clock Framework support for Exynos5 power-domain dependent clocks
14 #include "clk-exynos5-subcmu.h"
24 for (; num_regs > 0; --num_regs, ++rd) { in exynos5_subcmu_clk_save()
25 rd->save = readl(base + rd->offset); in exynos5_subcmu_clk_save()
26 writel((rd->save & ~rd->mask) | rd->value, base + rd->offset); in exynos5_subcmu_clk_save()
27 rd->save &= rd->mask; in exynos5_subcmu_clk_save()
35 for (; num_regs > 0; --num_regs, ++rd) in exynos5_subcmu_clk_restore()
36 writel((readl(base + rd->offset) & ~rd->mask) | rd->save, in exynos5_subcmu_clk_restore()
37 base + rd->offset); in exynos5_subcmu_clk_restore()
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| /openbmc/linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos5433.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
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| /openbmc/linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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| H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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| H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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| H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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