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/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A Dh3xxx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
39 /* machine-specific gpios */
60 …CARD_RESET (H3XXX_EGPIO_BASE + 1) /* reset the attached pcmcia/compactflash card. active high. */
61 …e H3XXX_EGPIO_OPT_RESET (H3XXX_EGPIO_BASE + 2) /* reset the attached option pack. active high. */
62 #define H3XXX_EGPIO_CODEC_NRESET (H3XXX_EGPIO_BASE + 3) /* reset the onboard UDA1341. active low. …
63 …H3XXX_EGPIO_OPT_NVRAM_ON (H3XXX_EGPIO_BASE + 4) /* apply power to optionpack nvram, active high. */
64 #define H3XXX_EGPIO_OPT_ON (H3XXX_EGPIO_BASE + 5) /* full power to option pack. active high. */
65 #define H3XXX_EGPIO_LCD_ON (H3XXX_EGPIO_BASE + 6) /* enable 3.3V to LCD. active high. */
66 #define H3XXX_EGPIO_RS232_ON (H3XXX_EGPIO_BASE + 7) /* UART3 transceiver force on. Active high. */
69 #define H3600_EGPIO_LCD_PCI (H3XXX_EGPIO_BASE + 8) /* LCD control IC enable. active high. */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra30-cardhu.dts1 /dts-v1/;
10 stdout-path = &uarta;
30 pcie-controller@00003000 {
34 avdd-pexb-supply = <&ldo1_reg>;
35 vdd-pexb-supply = <&ldo1_reg>;
36 avdd-pex-pll-supply = <&ldo1_reg>;
37 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
38 vddio-pex-ctl-supply = <&sys_3v3_reg>;
39 avdd-plle-supply = <&ldo2_reg>;
42 nvidia,num-lanes = <4>;
[all …]
H A Drk3288-veyron-speedy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "cros-ec-sbs.dtsi"
11 #include "rk3288-veyron-speedy-u-boot.dtsi"
15 compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
16 "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
17 "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
18 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
19 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
[all …]
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
[all …]
H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-16 {
28 pmx_fanctrl_17: pmx-fanctrl-17 {
33 pmx_fanalarm_18: pmx-fanalarm-18 {
38 pmx_hddled_20: pmx-hddled-20 {
43 pmx_hddled_21: pmx-hddled-21 {
48 pmx_hddled_22: pmx-hddled-22 {
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-cardhu-a04.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
10 compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
14 power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
15 bus-width = <4>;
16 keep-power-in-suspend;
19 ddr_reg: regulator-ddr {
20 compatible = "regulator-fixed";
21 regulator-name = "ddr";
[all …]
H A Dtegra30-cardhu-a02.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
10 compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30";
14 power-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
15 bus-width = <4>;
16 keep-power-in-suspend;
19 ddr_reg: regulator-ddr {
20 compatible = "regulator-fixed";
21 regulator-name = "vdd_ddr";
[all …]
H A Dtegra30-cardhu.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
16 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
17 * tegra30-cardhu-a04.dts.
20 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
22 * The (downstream internal) U-Boot of Cardhu display the board-id as
43 stdout-path = "serial0:115200n8";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dfixed-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/fixed-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
16 expected to have the regulator-min-microvolt and regulator-max-microvolt
20 - $ref: regulator.yaml#
21 - if:
25 const: regulator-fixed-clock
[all …]
H A Dgpio-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/gpio-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
18 - $ref: regulator.yaml#
22 const: regulator-gpio
24 regulator-name: true
26 enable-gpios:
[all …]
H A Dtps65132-regulator.txt4 - compatible: "ti,tps65132"
5 - reg: I2C slave address
9 device node describe the properties of these regulators. The sub-node
11 -For regulator outp, the sub node name should be "outp".
12 -For regulator outn, the sub node name should be "outn".
14 -enable-gpios:(active high, output) Regulators are controlled by the input pins.
17 -active-discharge-gpios: (active high, output) Some configurations use delay mechanisms
18 on the enable pin, to keep the regulator enabled for some time after
19 the enable signal goes low. This GPIO is used to actively discharge
20 the delay mechanism. Requires specification of ti,active-discharge-time-us
[all …]
H A Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
15 (Enable/Fail), Enable pin to turn chip on, and Fail pin as fault indication.
27 wakeup-source: true
32 enable-gpios:
33 description: A connection of the 'enable' gpio line.
36 richtek,ld-pulse-delay-us:
[all …]
/openbmc/linux/arch/arm/boot/dts/synaptics/
H A Dberlin2q-marvell-dmp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
12 model = "Marvell BG2-Q DMP";
13 compatible = "marvell,berlin2q-dmp", "marvell,berlin2q", "marvell,berlin";
22 stdout-path = "serial0:115200n8";
26 compatible = "simple-bus";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
/openbmc/u-boot/doc/device-tree-bindings/video/
H A Ddisplay-timing.txt1 display-timing bindings
4 display-timings node
5 --------------------
8 - none
11 - native-mode: The native mode for the display, in case multiple modes are
15 --------------
18 - hactive, vactive: display resolution
19 - hfront-porch, hback-porch, hsync-len: horizontal display timing parameters
21 vfront-porch, vback-porch, vsync-len: vertical display timing parameters in
23 - clock-frequency: display clock in Hz
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
43 non-descriptive information. For instance an LCD panel in a system that
55 panel-timing:
[all …]
/openbmc/linux/drivers/media/dvb-frontends/
H A Dm88ds3103.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 * enum m88ds3103_ts_mode - TS connection mode
47 * struct m88ds3103_platform_data - Platform data for the m88ds3103 driver
52 * @ts_clk_pol: TS clk polarity. 1-active at falling edge; 0-active at rising
59 * @lnb_hv_pol: LNB H/V pin polarity. 0: pin high set to VOLTAGE_18, pin low to
60 * set VOLTAGE_13. 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18.
61 * @lnb_en_pol: LNB enable pin polarity. 0: pin high to disable, pin low to
62 * enable. 1: pin high to enable, pin low to disable.
88 * struct m88ds3103_config - m88ds3102 configuration
98 * 1-active at falling edge; 0-active at rising edge.
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-radxa-e25.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include "rk3568-radxa-cm3i.dtsi"
14 pwm-leds {
15 compatible = "pwm-leds-multicolor";
17 multi-led {
19 max-brightness = <255>;
21 led-red {
26 led-green {
31 led-blue {
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6-logicpd-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 compatible = "gpio-keys";
9 button-0 {
13 debounce-interval = <10>;
14 wakeup-source;
17 button-1 {
21 debounce-interval = <10>;
22 wakeup-source;
25 button-2 {
29 debounce-interval = <10>;
[all …]
H A Dimx6dl-mamoj.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
22 backlight_lcd: backlight-lcd {
23 compatible = "pwm-backlight";
24 pwms = <&pwm3 0 25000>; /* 25000ns -> 40kHz */
25 brightness-levels = <0 4 8 16 32 64 128 160 192 224 255>;
26 default-brightness-level = <7>;
30 compatible = "fsl,imx-parallel-display";
[all …]
H A Dimx6q-apalis-ixora-v1.2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2014-2022 Toradex
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
14 #include "imx6qdl-apalis.dtsi"
18 compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q",
30 stdout-path = "serial0:115200n8";
34 compatible = "gpio-leds";
[all …]
/openbmc/u-boot/doc/device-tree-bindings/regulator/
H A Dfixed.txt4 The binding is done by the property "compatible" - this is different, than for
5 binding by the node prefix (doc/device-tree-bindings/regulator/regulator.txt).
8 - compatible: "regulator-fixed"
9 - regulator-name: this is required by the regulator uclass
12 - gpio: GPIO to use for enable control
13 - startup-delay-us: startup time in microseconds
14 - u-boot,off-on-delay-us: off delay time in microseconds
15 - regulator constraints (binding info: regulator.txt)
16 - enable-active-high: Polarity of GPIO is Active high. If this property
17 is missing, the default assumed is Active low.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Drtc-omap.txt4 - compatible:
5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
7 This RTC IP has special WAKE-EN Register to enable
11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
12 - reg: Address range of rtc register set
13 - interrupts: rtc timer, alarm interrupts in order
16 - system-power-controller: whether the rtc is controlling the system power
18 - clocks: Any internal or external clocks feeding in to rtc
19 - clock-names: Corresponding names of the clocks
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpiolib-of.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2007-2008 MontaVista Software, Inc.
26 #include "gpiolib-of.h"
29 * This is Linux-specific flags. By default controllers' and Linux' mapping
31 * Linux-specific in their .xlate callback. Though, 1:1 mapping is recommended.
44 * of_gpio_named_count() - Count GPIOs for a device
51 * -EINVAL for an incorrectly formed gpios property, or
52 * -ENOENT for a missing gpios property
66 return of_count_phandle_with_args(np, propname, "#gpio-cells"); in of_gpio_named_count()
70 * of_gpio_spi_cs_get_count() - special GPIO counting for SPI
[all …]
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
21 - description: Delay between rts signal and beginning of data sent in
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210-p2894.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
16 stdout-path = "serial0:115200n8";
26 pinctrl-names = "boot";
27 pinctrl-0 = <&state_boot>;
35 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
36 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
[all …]

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