Searched +full:dw +full:- +full:umctl2 +full:- +full:ddrc (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only3 ---4 $id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Synopsys DesignWare Universal Multi-Protocol Memory Controller10 - Krzysztof Kozlowski <krzk@kernel.org>11 - Michal Simek <michal.simek@amd.com>14 Synopsys DesignWare Enhanced uMCTL2 DDR Memory Controller is capable of17 16-bits or 32-bits or 64-bits wide.19 For instance the ZynqMP DDR controller is based on the DW uMCTL2 v2.40a[all …]
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1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'3 2024-12-2[all...]