/openbmc/linux/Documentation/devicetree/bindings/regulator/ |
H A D | lp872x.txt | 4 - compatible: "ti,lp8720" or "ti,lp8725" 5 - reg: I2C slave address. 0x7d = LP8720, 0x7a = LP8725 8 - ti,general-config: the value of LP872X_GENERAL_CFG register (u8) 10 bit[2]: BUCK output voltage control by external DVS pin or register 12 bit[1]: sleep control by external DVS pin or register 20 bit[2]: BUCK1 output voltage control by external DVS pin or register 21 1 = register 08h, 0 = DVS 22 bit[1]: LDO sleep control. 1 = sleep mode, 0 = normal 27 - ti,update-config: define it when LP872X_GENERAL_CFG register should be set 28 - ti,dvs-gpio: GPIO specifier for external DVS pin control of LP872x devices. [all …]
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H A D | maxim,max8952.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 - $ref: regulator.yaml# 19 max8952,default-mode: 23 index of default DVS voltage 25 max8952,dvs-mode-microvolt: 32 Array of 4 integer values defining DVS voltages in microvolts. All values 35 max8952,en-gpio: [all …]
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H A D | maxim,max8997.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 motor driver, flash LED driver and Micro-USB Interface Controller. 22 const: maxim,max8997-pmic 24 charger-supply: 30 - description: irq1 interrupt 31 - description: alert interrupt 33 max8997,pmic-buck1-dvs-voltage: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | samsung,s5m8767.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 17 and current regulators, RTC, clock outputs and other sub-blocks. 21 const: samsung,s5m8767-pmic 39 s5m8767,pmic-buck2-dvs-voltage: 40 $ref: /schemas/types.yaml#/definitions/uint32-array 44 A set of 8 voltage values in micro-volt (uV) units for buck2 when 45 changing voltage using gpio dvs. [all …]
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H A D | rohm,bd71815-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/rohm,bd71815-pmic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 13 BD71815AGW is a single-chip power management ICs for battery-powered 15 for LED and a 500 mA single-cell linear charger. Also included is a Coulomb 16 counter, a real-time clock (RTC), and a 32.768 kHz clock gate and two GPOs. 30 gpio-controller: true 32 "#gpio-cells": [all …]
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos4412-itop-scp-core.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <dt-bindings/clock/samsung,s2mps11.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/input/input.h> 17 #include "exynos4412-ppmu-common.dtsi" 18 #include "exynos-mfc-reserved-memory.dtsi" 31 compatible = "samsung,secure-firmware"; 35 fixed-rate-clocks { 37 compatible = "samsung,clock-xxti"; 38 clock-frequency = <0>; [all …]
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H A D | exynos4412-origen.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 12 /dts-v1/; 14 #include <dt-bindings/clock/samsung,s2mps11.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/input.h> 17 #include "exynos-mfc-reserved-memory.dtsi" 34 stdout-path = "serial2:115200n8"; 38 compatible = "samsung,secure-firmware"; 42 mmc_reg: regulator-0 { [all …]
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H A D | s5pv210-aquila.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 13 /dts-v1/; 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/input/input.h> 35 pmic_ap_clk: clock-0 { 37 compatible = "fixed-clock"; 38 #clock-cells = <0>; 39 clock-frequency = <32768>; 42 vtf_reg: regulator-0 { [all …]
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H A D | s5pv210-goni.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 13 /dts-v1/; 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/interrupt-controller/irq.h> 16 #include <dt-bindings/input/input.h> 38 pmic_ap_clk: clock-0 { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <32768>; [all …]
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H A D | exynos4210-universal_c210.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 12 /dts-v1/; 14 #include <dt-bindings/gpio/gpio.h> 19 chassis-type = "handset"; 35 stdout-path = "serial2:115200n8"; 39 fixed-rate-clocks { 41 compatible = "samsung,clock-xxti"; 42 clock-frequency = <0>; 46 compatible = "samsung,clock-xusbxti"; [all …]
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H A D | exynos4210-origen.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 14 /dts-v1/; 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/input/input.h> 18 #include <dt-bindings/leds/common.h> 19 #include "exynos-mfc-reserved-memory.dtsi" 40 stdout-path = "serial2:115200n8"; 43 mmc_reg: voltage-regulator { [all …]
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mq-pico-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 9 /dts-v1/; 12 #include <dt-bindings/interrupt-controller/irq.h> 15 model = "TechNexion PICO-PI-8M"; 16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq"; 19 stdout-path = &uart1; 22 pmic_osc: clock-pmic { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <32768>; [all …]
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H A D | imx8mq-phanbell.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright 2017-2019 NXP 6 /dts-v1/; 9 #include <dt-bindings/interrupt-controller/irq.h> 13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq"; 16 stdout-path = &uart1; 24 pmic_osc: clock-pmic { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; 27 clock-frequency = <32768>; [all …]
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H A D | imx8mm-innocomm-wb15.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 reg_modem: regulator-modem { 11 compatible = "regulator-fixed"; 12 pinctrl-names = "default"; 13 pinctrl-0 = <&pinctrl_modem_regulator>; 14 regulator-min-microvolt = <3300000>; 15 regulator-max-microvolt = <3300000>; 16 regulator-name = "epdev_on"; 18 enable-active-high; [all …]
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H A D | imx8mq-librem5-devkit.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 Purism SPC 6 /dts-v1/; 8 #include "dt-bindings/input/input.h" 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/leds/common.h> 11 #include "dt-bindings/pwm/pwm.h" 12 #include "dt-bindings/usb/pd.h" 17 compatible = "purism,librem5-devkit", "fsl,imx8mq"; 19 backlight_dsi: backlight-dsi { [all …]
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H A D | imx8mp-phycore-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/net/ti-dp83867.h> 11 model = "PHYTEC phyCORE-i.MX8MP"; 12 compatible = "phytec,imx8mp-phycore-som", "fsl,imx8mp"; 26 cpu-supply = <&buck2>; 30 cpu-supply = <&buck2>; 34 cpu-supply = <&buck2>; 38 cpu-supply = <&buck2>; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&pinctrl_fec>; [all …]
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H A D | imx8mp-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 18 reg_wl_bt: regulator-wifi-bt { 19 compatible = "regulator-fixed"; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&pinctrl_reg_wl_bt>; 22 regulator-name = "wl-bt-pow-dwn"; 23 regulator-min-microvolt = <3300000>; 24 regulator-max-microvolt = <3300000>; 26 startup-delay-us = <70000>; 27 regulator-always-on; [all …]
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H A D | imx8mm-tqma8mqml.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML"; 11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 19 /* e-MMC IO, needed for HS modes */ 20 reg_vcc1v8: regulator-vcc1v8 { 21 compatible = "regulator-fixed"; 22 regulator-name = "TQMA8MXML_VCC1V8"; 23 regulator-min-microvolt = <1800000>; [all …]
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H A D | imx8mn-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 14 compatible = "mmc-pwrseq-simple"; 15 pinctrl-names = "default"; 16 pinctrl-0 = <&pinctrl_usdhc1_gpio>; 17 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 19 clock-names = "ext_clock"; 20 post-power-on-delay-ms = <80>; 30 cpu-supply = <&buck2_reg>; 34 cpu-supply = <&buck2_reg>; 38 cpu-supply = <&buck2_reg>; [all …]
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H A D | imx8mm-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 13 compatible = "mmc-pwrseq-simple"; 14 pinctrl-names = "default"; 15 pinctrl-0 = <&pinctrl_usdhc1_gpio>; 16 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 18 clock-names = "ext_clock"; 19 post-power-on-delay-ms = <80>; 29 cpu-supply = <&buck2_reg>; 33 cpu-supply = <&buck2_reg>; 37 cpu-supply = <&buck2_reg>; [all …]
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H A D | imx8mm-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 10 model = "Variscite VAR-SOM-MX8MM module"; 11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm"; 14 stdout-path = &uart4; 22 reg_eth_phy: regulator-eth-phy { 23 compatible = "regulator-fixed"; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&pinctrl_reg_eth_phy>; 26 regulator-name = "eth_phy_pwr"; 27 regulator-min-microvolt = <3300000>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | exynos5250-spring.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/input/input.h> 48 samsung,bl1-offset = <0x1400>; 49 samsung,bl2-offset = <0x3400>; 50 u-boot-memory = "/memory"; 51 u-boot-offset = <0x3e00000 0x100000>; 56 #address-cells = <1>; [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-tinker.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/clock/rockchip,rk808.h> 12 stdout-path = "serial2:115200n8"; 20 ext_gmac: external-gmac-clock { 21 compatible = "fixed-clock"; 22 #clock-cells = <0>; 23 clock-frequency = <125000000>; 24 clock-output-names = "ext_gmac"; 27 gpio-keys { [all …]
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H A D | rk3288-veyron-fievel.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "rk3288-veyron.dtsi" 10 #include "rk3288-veyron-analog-audio.dtsi" 14 compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7", 15 "google,veyron-fievel-rev6", "google,veyron-fievel-rev5", 16 "google,veyron-fievel-rev4", "google,veyron-fievel-rev3", 17 "google,veyron-fievel-rev2", "google,veyron-fievel-rev1", 18 "google,veyron-fievel-rev0", "google,veyron-fievel", 22 compatible = "regulator-fixed"; [all …]
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/openbmc/linux/drivers/regulator/ |
H A D | max8952.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * max8952.c - Voltage and current regulation for the Maxim 8952 46 int ret = i2c_smbus_read_byte_data(max8952->client, reg); in max8952_read_reg() 57 return i2c_smbus_write_byte_data(max8952->client, reg, value); in max8952_write_reg() 66 return -EINVAL; in max8952_list_voltage() 68 return (max8952->pdata->dvs_mode[selector] * 10 + 770) * 1000; in max8952_list_voltage() 76 if (max8952->vid0) in max8952_get_voltage_sel() 78 if (max8952->vid1) in max8952_get_voltage_sel() 89 if (!max8952->vid0_gpiod || !max8952->vid1_gpiod) { in max8952_set_voltage_sel() 90 /* DVS not supported */ in max8952_set_voltage_sel() [all …]
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