Searched full:dmc0 (Results 1 – 10 of 10) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/devfreq/event/ |
H A D | samsung,exynos-ppmu.yaml | 83 ppmu_dmc0_3: ppmu-event3-dmc0 { 84 event-name = "ppmu-event3-dmc0"; 87 ppmu_dmc0_2: ppmu-event2-dmc0 { 88 event-name = "ppmu-event2-dmc0"; 91 ppmu_dmc0_1: ppmu-event1-dmc0 { 92 event-name = "ppmu-event1-dmc0"; 95 ppmu_dmc0_0: ppmu-event0-dmc0 { 96 event-name = "ppmu-event0-dmc0"; 163 ppmu-event3-dmc0 { 164 event-name = "ppmu-event3-dmc0";
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos4412-ppmu-common.dtsi | 13 ppmu_dmc0_3: ppmu-event3-dmc0 { 14 event-name = "ppmu-event3-dmc0";
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H A D | s5pv210.dtsi | 28 dmc0 = &dmc0; 498 dmc0: dmc@f0000000 { label
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H A D | exynos5420.dtsi | 413 ppmu_event3_dmc0_0: ppmu-event3-dmc0-0 { 414 event-name = "ppmu-event3-dmc0-0"; 425 ppmu_event3_dmc0_1: ppmu-event3-dmc0-1 { 426 event-name = "ppmu-event3-dmc0-1";
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/openbmc/linux/drivers/cpufreq/ |
H A D | s5pv210-cpufreq.c | 106 /* DRAM configuration (DMC0 and DMC1) */ 120 DMC0 = 0, enumerator 202 if (ch == DMC0) { in s5pv210_set_refresh() 282 s5pv210_set_refresh(DMC0, 83000); in s5pv210_target() 458 * DMC0 : 166Mhz in s5pv210_target() 461 s5pv210_set_refresh(DMC0, 166000); in s5pv210_target() 465 * DMC0 : 83Mhz in s5pv210_target() 468 s5pv210_set_refresh(DMC0, 83000); in s5pv210_target()
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/openbmc/linux/Documentation/devicetree/bindings/edac/ |
H A D | dmc-520.yaml | 56 dmc0: dmc@200000 {
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/openbmc/linux/drivers/devfreq/event/ |
H A D | exynos-ppmu.c | 60 PPMU_EVENT(dmc0), 103 PPMU_EVENT(dmc0-0), 104 PPMU_EVENT(dmc0-1),
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/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | samsung,exynos-bus.yaml | 263 ppmu_dmc0_3: ppmu-event3-dmc0 { 264 event-name = "ppmu-event3-dmc0";
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | samsung,exynos5422-dmc.yaml | 105 ppmu_event_dmc0_0: ppmu-event3-dmc0-0 {
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/openbmc/u-boot/board/samsung/goni/ |
H A D | lowlevel_init.S | 336 /* OneDRAM(DMC0) clock setting */
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