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/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dti-dma-crossbar.txt1 Texas Instruments DMA Crossbar (DMA request router)
4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
12 The DMA controller node need to have the following poroperties:
13 - dma-requests: Number of DMA requests the controller can handle
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H A Ddma-router.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-router.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DMA Router Common Properties
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: dma-common.yaml#
16 DMA routers are transparent IP blocks used to route DMA request
17 lines from devices to the DMA controller. Some SoCs (like TI DRA7x)
18 have more peripherals integrated with DMA requests than what the DMA
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/openbmc/linux/lib/
H A Dgenalloc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * kmalloc/kfree interface. Uses for this includes on-device special
8 * It is safe to use the allocator in NMI handlers and other special
21 * On architectures that don't have NMI-safe cmpxchg implementation,
26 * Copyright 2005 (C) Jes Sorensen <jes@trained-monkey.org>
42 return chunk->end_addr - chunk->start_addr + 1; in chunk_size()
52 return -EBUSY; in set_bits_ll()
66 return -EBUSY; in clear_bits_ll()
74 * bitmap_set_ll - set the specified number of bits at the specified position
75 * @map: pointer to a bitmap
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/openbmc/linux/include/linux/
H A Dgenalloc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * kmalloc/kfree interface. Uses for this includes on-device special
8 * It is safe to use the allocator in NMI handlers and other special
21 * On architectures that don't have NMI-safe cmpxchg implementation,
41 * @map: Pointer to bitmap
48 typedef unsigned long (*genpool_algo_t)(unsigned long *map,
108 * gen_pool_add - add a new chunk of special memory to the pool
113 * allocated on, or -1
117 * Returns 0 on success or a -ve errno on failure.
122 return gen_pool_add_virt(pool, addr, -1, size, nid); in gen_pool_add()
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H A Ddma-map-ops.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * It should not be included in drivers just using the DMA API.
9 #include <linux/dma-mapping.h>
88 #include <asm/dma-mapping.h>
92 if (dev->dma_ops) in get_dma_ops()
93 return dev->dma_ops; in get_dma_ops()
100 dev->dma_ops = dma_ops; in set_dma_ops()
118 if (dev && dev->cma_area) in dev_get_cma_area()
119 return dev->cma_area; in dev_get_cma_area()
147 return -ENOSYS; in dma_contiguous_reserve_area()
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H A Dvirtio_pci_modern.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 __le16 queue_notify_data; /* read-write */
12 __le16 queue_reset; /* read-write */
19 /* Device-specific data (non-legacy mode) */
21 /* Base of vq notifications (non-legacy mode). */
28 /* So we can sanity-check accesses. */
32 /* Capability for when we need to map notifications per-vq. */
35 /* Multiply queue_notify_off by this value. (non-legacy mode). */
42 /* optional check for vendor virtio device, returns dev_id or -ERRNO */
45 /* optional mask for devices with limited DMA space */
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H A Ddmaengine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
20 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
49 * automatically set as dma devices are registered.
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
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H A Ddma-mapping.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #include <linux/dma-direction.h>
16 * List of possible attributes associated with a DMA mapping. The semantics
17 * of each attribute should be defined in Documentation/core-api/dma-attributes.rst.
47 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
53 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
61 * at least read-only at lesser-privileged levels).
66 * A dma_addr_t can hold any valid DMA or bus address for the platform. It can
67 * be given to a device to use as a DMA source or target. It is specific to a
77 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
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/openbmc/linux/Documentation/driver-api/usb/
H A Ddma.rst1 USB DMA
5 over how DMA may be used to perform I/O operations. The APIs are detailed
11 The big picture is that USB drivers can continue to ignore most DMA issues,
12 though they still must provide DMA-ready buffers (see
13 Documentation/core-api/dma-api-howto.rst). That's how they've worked through
14 the 2.4 (and earlier) kernels, or they can now be DMA-aware.
16 DMA-aware usb drivers:
18 - New calls enable DMA-aware drivers, letting them allocate dma buffers and
19 manage dma mappings for existing dma-ready buffers (see below).
21 - URBs have an additional "transfer_dma" field, as well as a transfer_flags
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/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_mm.c26 #include <linux/io-mapping.h>
41 #define use_dma(io) ((io) != -1)
45 if (use_dma(r->iobase)) in sgt_pfn()
46 return (r->sgt.dma + r->sgt.curr + r->iobase) >> PAGE_SHIFT; in sgt_pfn()
48 return r->sgt.pfn + (r->sgt.curr >> PAGE_SHIFT); in sgt_pfn()
55 if (GEM_WARN_ON(!r->sgt.sgp)) in remap_sg()
56 return -EINVAL; in remap_sg()
59 set_pte_at(r->mm, addr, pte, in remap_sg()
60 pte_mkspecial(pfn_pte(sgt_pfn(r), r->prot))); in remap_sg()
61 r->pfn++; /* track insertions in case we need to unwind later */ in remap_sg()
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/openbmc/linux/drivers/dma/ti/
H A Ddma-crossbar.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
25 .compatible = "ti,dra7-dma-crossbar",
29 .compatible = "ti,am335x-edma-crossbar",
44 u32 dma_requests; /* number of DMA requests on eDMA */
60 writeb_relaxed(val, iomem + (63 - event % 4)); in ti_am335x_xbar_write()
68 struct ti_am335x_xbar_map *map = route_data; in ti_am335x_xbar_free() local
71 map->mux_val, map->dma_line); in ti_am335x_xbar_free()
73 ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0); in ti_am335x_xbar_free()
74 kfree(map); in ti_am335x_xbar_free()
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/openbmc/linux/Documentation/core-api/
H A Ddma-api-howto.rst2 Dynamic DMA mapping Guide
9 This is a guide to device driver writers on how to use the DMA API
10 with example pseudo-code. For a concise description of the API, see
11 DMA-API.txt.
13 CPU and DMA addresses
16 There are several kinds of addresses involved in the DMA API, and it's
27 address is not directly useful to a driver; it must use ioremap() to map
31 registers at an MMIO address, or if it performs DMA to read or write system
37 From a device's point of view, DMA uses the bus address space, but it may
39 supports 64-bit addresses for main memory and PCI BARs, it may use an IOMMU
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/openbmc/linux/drivers/gpu/drm/
H A Ddrm_fbdev_dma.c1 // SPDX-License-Identifier: MIT
19 struct drm_fb_helper *fb_helper = info->par; in drm_fbdev_dma_fb_open()
22 if (user && !try_module_get(fb_helper->dev->driver->fops->owner)) in drm_fbdev_dma_fb_open()
23 return -ENODEV; in drm_fbdev_dma_fb_open()
30 struct drm_fb_helper *fb_helper = info->par; in drm_fbdev_dma_fb_release()
33 module_put(fb_helper->dev->driver->fops->owner); in drm_fbdev_dma_fb_release()
40 struct drm_fb_helper *fb_helper = info->par; in drm_fbdev_dma_fb_destroy()
42 if (!fb_helper->dev) in drm_fbdev_dma_fb_destroy()
47 drm_client_buffer_vunmap(fb_helper->buffer); in drm_fbdev_dma_fb_destroy()
48 drm_client_framebuffer_delete(fb_helper->buffer); in drm_fbdev_dma_fb_destroy()
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/openbmc/linux/Documentation/driver-api/
H A Dvfio.rst2 VFIO - "Virtual Function I/O" [1]_
5 Many modern systems now provide DMA and interrupt remapping facilities
7 allotted. This includes x86 hardware with AMD-Vi and Intel VT-d,
12 safe [2]_, non-privileged, userspace drivers.
19 bare-metal device drivers [3]_.
22 field, also benefit from low-overhead, direct device access from
23 userspace. Examples include network adapters (often non-TCP/IP based)
36 ---------------------------
40 and DMA. Without going into the details of each of these, DMA is
42 as allowing a device read-write access to system memory imposes the
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H A Ddevice-io.rst10 Bus-Independent Device Accesses
27 ----------------------------
49 --------------------
52 memory-mapped registers on the device. Linux provides interfaces to read
53 and write 8-bit, 16-bit, 32-bit and 64-bit quantities. Due to a
82 from config space, which is guaranteed to soft-fail if the card doesn't
94 reg = ha->iobase;
96 WRT_REG_WORD(&reg->ictrl, 0);
102 RD_REG_WORD(&reg->ictrl);
103 ha->flags.ints_enabled = 0;
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/openbmc/linux/include/net/page_pool/
H A Dtypes.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/dma-direction.h>
9 #define PP_FLAG_DMA_MAP BIT(0) /* Should page_pool do the DMA
10 * map/unmap
14 * DMA-synced-for-device according to
17 * Please note DMA-sync-for-CPU is still
29 * use-case. The NAPI budget is 64 packets. After a NAPI poll the RX
33 * Keeping room for more objects, is due to XDP_DROP use-case. As
47 * struct page_pool_params - page pool parameters
52 * @dev: device, for DMA pre-mapping purposes
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/openbmc/linux/drivers/pci/
H A Dp2pdma.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCI Peer 2 Peer DMA support.
5 * Copyright (c) 2016-2018, Logan Gunthorpe
6 * Copyright (c) 2016-2017, Microsemi Corporation
11 #define pr_fmt(fmt) "pci-p2pdma: " fmt
13 #include <linux/dma-map-ops.h>
14 #include <linux/pci-p2pdma.h>
19 #include <linux/percpu-refcount.h>
49 p2pdma = rcu_dereference(pdev->p2pdma); in size_show()
50 if (p2pdma && p2pdma->pool) in size_show()
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/openbmc/linux/arch/arm/mm/
H A Dinit.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 1995-2005 Russell King
21 #include <linux/dma-map-ops.h>
27 #include <asm/mach-types.h>
40 #include <asm/mach/map.h>
57 phys_initrd_start = __virt_to_phys(tag->u.initrd.start); in parse_tag_initrd()
58 phys_initrd_size = tag->u.initrd.size; in parse_tag_initrd()
66 phys_initrd_start = tag->u.initrd.start; in parse_tag_initrd2()
67 phys_initrd_size = tag->u.initrd.size; in parse_tag_initrd2()
88 * The DMA mask corresponding to the maximum bus address allocatable
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/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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/openbmc/linux/net/core/
H A Dpage_pool.c1 /* SPDX-License-Identifier: GPL-2.0
16 #include <linux/dma-direction.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/page-flags.h>
33 #define alloc_stat_inc(pool, __stat) (pool->alloc_stats.__stat++)
34 /* recycle_stat_inc is safe to use when preemption is possible. */
37 struct page_pool_recycle_stats __percpu *s = pool->recycle_stats; \
38 this_cpu_inc(s->__stat); \
43 struct page_pool_recycle_stats __percpu *s = pool->recycle_stats; \
44 this_cpu_add(s->__stat, val); \
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/openbmc/linux/drivers/mtd/spi-nor/
H A Dsfdp.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/mtd/spi-nor.h>
14 #define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
16 (((p)->parameter_table_pointer[2] << 16) | \
17 ((p)->parameter_table_pointer[1] << 8) | \
18 ((p)->parameter_table_pointer[0] << 0))
19 #define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)
22 #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */
23 #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
27 * Register Map.
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/openbmc/linux/drivers/media/pci/ivtv/
H A Divtv-yuv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "ivtv-driver.h"
10 #include "ivtv-udma.h"
11 #include "ivtv-yuv.h"
25 static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma, in ivtv_yuv_prep_user_dma() argument
30 struct yuv_playback_info *yi = &itv->yuv_info; in ivtv_yuv_prep_user_dma()
31 u8 frame = yi->draw_frame; in ivtv_yuv_prep_user_dma()
32 struct yuv_frame_info *f = &yi->new_frame_info[frame]; in ivtv_yuv_prep_user_dma()
40 y_decode_height = uv_decode_height = f->src_h + f->src_y; in ivtv_yuv_prep_user_dma()
42 if (f->offset_y) in ivtv_yuv_prep_user_dma()
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/openbmc/linux/sound/soc/fsl/
H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
66 * (bit-endianness must match byte-endianness). Processors typically write
68 * written in. So if the host CPU is big-endian, then only big-endian
91 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
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/openbmc/linux/drivers/parisc/
H A Dccio-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** ccio-dma.c:
4 ** DMA management routines for first generation cache-coherent machines.
9 ** (c) Copyright 2000 Hewlett-Packard Company
13 ** the I/O MMU - basically what x86 does.
16 ** o outbound DMA is slower - U2 won't prefetch data (GSC+ XQL signal).
17 ** o Inbound DMA less efficient - U2 can't use DMA_FAST attribute.
19 ** o Doesn't work under PCX-U/U+ machines since they didn't follow
20 ** the coherency design originally worked out. Only PCX-W does.
34 #include <linux/dma-map-ops.h>
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/openbmc/linux/arch/x86/include/asm/
H A Dio.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * versions of the single-IO instructions (inb_p/inw_p/..).
19 * Thanks to James van Artsdalen for a better timing-fix than
23 * On the other hand, I'd like to be sure of a non-existent port:
24 * I feel a bit unsafe about using 0x80 (should be safe, though)
35 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
116 * virt_to_phys - map virtual addresses to physical
123 * This function does not give bus mappings for DMA transfers. In
135 * phys_to_virt - map physical address to virtual
142 * This function does not handle bus mappings for DMA transfers. In
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