/openbmc/linux/include/linux/ |
H A D | timecounter.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 14 #define CYCLECOUNTER_MASK(bits) (u64)((bits) < 64 ? ((1ULL<<(bits))-1) : -1) 17 * struct cyclecounter - hardware abstraction for a free running counter 18 * Provides completely state-free accessors to the underlying hardware. 19 * Depending on which hardware it reads, the cycle counter may wrap 23 * @read: returns the current cycle value 27 * @mult: cycle to nanosecond multiplier 28 * @shift: cycle to nanosecond divisor (power of two) 38 * struct timecounter - layer above a %struct cyclecounter which counts nanoseconds 40 * cycle counter wrap around. Initialize with [all …]
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/openbmc/openbmc/meta-facebook/meta-minerva/recipes-phosphor/state/phosphor-state-manager/ |
H A D | chassis-powercycle | 3 # shellcheck source=meta-facebook/meta-minerva/recipes-minerva/plat-tool/files/minerva-common-funct… 4 source /usr/libexec/minerva-common-functions 6 # Minerva CMM Sled Power Cycle and Chassis Power Cycle 8 cmm-hsc-power-cycle() { 11 # REBOOT 0 Write a 1 to reboot. 13 …# RBT_DL 100 Configures Auto-Reboot turn-on Delay (tDL(RBT)) after the REBOOT bit is set to 1 23 ret1=$(i2cset -y -f 0 0x44 0xfd 0x00) 24 ret2=$(i2cset -y -f 0 0x44 0xfd 0x0b) 27 ret3=$(i2cset -f -y 0 0x43 0xec) 29 if [ "$ret3" -ne 0 ] && { [ "$ret1" -ne 0 ] || [ "$ret2" -ne 0 ]; }; then [all …]
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/openbmc/linux/drivers/staging/vme_user/ |
H A D | vme_fake.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 49 u32 cycle; member 57 u32 cycle; member 99 bridge = fake_bridge->driver_priv; in fake_VIRQ_tasklet() 101 vme_irq_handler(fake_bridge, bridge->int_level, bridge->int_statid); in fake_VIRQ_tasklet() 132 bridge = fake_bridge->driver_priv; in fake_irq_generate() 134 mutex_lock(&bridge->vme_int); in fake_irq_generate() 136 bridge->int_level = level; in fake_irq_generate() 138 bridge->int_statid = statid; in fake_irq_generate() 144 tasklet_schedule(&bridge->int_tasklet); in fake_irq_generate() [all …]
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H A D | vme_tsi148.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Support for the Tundra TSI148 VME-PCI Bridge Chip 20 #include <linux/dma-mapping.h> 80 wake_up(&bridge->dma_queue[0]); in tsi148_DMA_irqhandler() 84 wake_up(&bridge->dma_queue[1]); in tsi148_DMA_irqhandler() 102 bridge->lm_callback[i](bridge->lm_data[i]); in tsi148_LM_irqhandler() 122 bridge = tsi148_bridge->driver_priv; in tsi148_MB_irqhandler() 126 val = ioread32be(bridge->base + TSI148_GCSR_MBOX[i]); in tsi148_MB_irqhandler() 127 dev_err(tsi148_bridge->parent, "VME Mailbox %d received: 0x%x\n", in tsi148_MB_irqhandler() 143 bridge = tsi148_bridge->driver_priv; in tsi148_PERR_irqhandler() [all …]
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/State/Boot/ |
H A D | PostCode.interface.yaml | 2 Monitor Post code coming and buffer all of them based on boot cycle into 6 - name: CurrentBootCycleCount 10 archived. It starts from 1 and is limited to MaxBootCycleNum. 11 - name: MaxBootCycleNum 18 - name: GetPostCodesWithTimeStamp 20 Method to get the cached post codes of the indicated boot cycle with 23 - name: Index 26 Index indicates which boot cycle of post codes is requested. 1 27 is for the most recent boot cycle. CurrentBootCycleCount is for 28 the oldest boot cycle. [all …]
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/openbmc/linux/arch/alpha/lib/ |
H A D | ev6-csum_ipv6_magic.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * arch/alpha/lib/ev6-csum_ipv6_magic.S 4 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com> 15 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html 17 * E - either cluster 18 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1 19 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1 32 * Then turn it back into a sign extended 32-bit item 35 * Swap <len> (an unsigned int) using Mike Burrows' 7-instruction sequence 36 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence) [all …]
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/openbmc/openbmc/meta-facebook/meta-yosemite4/recipes-phosphor/state/phosphor-state-manager/ |
H A D | chassis-powercycle | 6 # shellcheck source=meta-facebook/meta-yosemite4/recipes-phosphor/state/phosphor-state-manager/powe… 7 source /usr/libexec/phosphor-state-manager/power-cmd 8 # shellcheck source=meta-facebook/meta-yosemite4/recipes-yosemite4/plat-tool/files/yosemite4-common… 9 source /usr/libexec/yosemite4-common-functions 11 #IO 0:7 input port for showing slot 1:8 power status 12 #IO 8:16 output port for controlling slot 1:8 power status 13 CHASSIS_ID=$1 14 IO_EXP_SLOT_PWR_STATUS=$((CHASSIS_ID - 1)) 21 if [ -z "$MANAGEMENT_BOARD_VERSION" ]; then 22 echo "Failed to check management board fru info, sled cycle keep default setting" [all …]
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/openbmc/linux/scripts/ |
H A D | headerdep.pl | 2 # SPDX-License-Identifier: GPL-2.0 46 print " --all\n"; 47 print " --graph\n"; 49 print " -I includedir\n"; 52 print " $0 --graph include/linux/kernel.h | dot -Tpng -o graph.png\n"; 78 return $filename if -f $filename; 82 return $path if -f $path; 107 push @{$deps{$header}}, [$i + 1, $dep]; 114 # $cycle[n] includes $cycle[n + 1]; 115 # $cycle[-1] will be the culprit [all …]
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/openbmc/linux/tools/testing/selftests/tc-testing/tc-tests/actions/ |
H A D | gate.json | 4 "name": "Add gate action with priority and sched-entry", 13 1, 17 … "cmdUnderTest": "$TC action add action gate priority 1 sched-entry close 100000000ns index 100", 20 "matchPattern": "action order [0-9]*: .*priority 1.*index 100 ref", 21 "matchCount": "1", 28 "name": "Add gate action with base-time", 37 1, 41 …"cmdUnderTest": "$TC action add action gate base-time 200000000000ns sched-entry close 100000000ns… 44 "matchPattern": "action order [0-9]*: .*base-time 200s.*index 10 ref", 45 "matchCount": "1", [all …]
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/openbmc/openbmc/meta-facebook/meta-harma/recipes-phosphor/state/phosphor-state-manager/ |
H A D | chassis-powercycle | 3 # shellcheck source=meta-facebook/meta-harma/recipes-phosphor/state/phosphor-state-manager/power-cmd 4 source /usr/libexec/phosphor-state-manager/power-cmd 6 #Sled cycle [all...] |
/openbmc/linux/Documentation/hwmon/ |
H A D | dme1737.rst | 18 Addresses scanned: none, address read from Super-I/O config space 34 Addresses scanned: none, address read from Super-I/O config space 43 ----------------- 52 Include non-standard LPC addresses 0x162e and 0x164e 55 - VIA EPIA SN18000 59 ----------- 63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors 64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and 65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement 66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and [all …]
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H A D | vt1211.rst | 10 Addresses scanned: none, address read from Super-I/O config space 24 ----------------- 29 configuration for channels 1-5. 30 Legal values are in the range of 0-31. Bit 0 maps to 31 UCH1, bit 1 maps to UCH2 and so on. Setting a bit to 1 47 ----------- 49 The VIA VT1211 Super-I/O chip includes complete hardware monitoring 51 temp2), 1 dedicated voltage (in5) and 2 fans. Additionally, the chip 52 implements 5 universal input channels (UCH1-5) that can be individually 60 connected to the PWM outputs of the VT1211 :-(). [all …]
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/openbmc/openbmc-test-automation/extended/ |
H A D | test_bmc_reset_loop.robot | 2 Documentation Power cycle loop. This is to test where network service 3 ... becomes unavailable during AC-Cycle stress test. 19 ${CHECK_FOR_ERRORS} ${1} 22 ${ERROR_REGEX} SEGV|core-dump|FAILURE|Failed to start|Found ordering cycle 26 Run Multiple Power Cycle 34 Repeat Keyword ${LOOP_COUNT} times Power Cycle System Via PDU 44 Repeat Keyword ${LOOP_COUNT} times BMC Redfish Reset Cycle 54 Repeat Keyword ${LOOP_COUNT} times BMC Reboot Cycle 64 Repeat Keyword ${LOOP_COUNT} times BMC Redfish Reset Runtime Cycle 68 Power Cycle System Via PDU [all …]
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/openbmc/linux/drivers/pwm/ |
H A D | pwm-sl28cpld.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 * enough to be briefly explained. It consists of one 8-bit counter. The PWM 15 * +-----------+--------+--------------+-----------+---------------+ 17 * +-----------+--------+--------------+-----------+---------------+ 19 * | 1 | cnt[6] | cnt[5:0] | 500 Hz | 2000000 ns | 20 * | 2 | cnt[5] | cnt[4:0] | 1 kHz | 1000000 ns | 22 * +-----------+--------+--------------+-----------+---------------+ 25 * - The hardware cannot generate a 100% duty cycle if the prescaler is 0. 26 * - The hardware cannot atomically set the prescaler and the counter value, 28 * - The counter is not reset if you switch the prescaler which leads [all …]
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/openbmc/linux/drivers/net/dsa/sja1105/ |
H A D | sja1105_tas.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #define SJA1105_TAS_CLKSRC_STANDALONE 1 10 #define SJA1105_GATE_MASK GENMASK_ULL(SJA1105_NUM_TC - 1, 0) 19 struct sja1105_tas_data *tas_data = &priv->tas_data; in sja1105_tas_set_runtime_params() 20 struct sja1105_gating_config *gating_cfg = &tas_data->gating_cfg; in sja1105_tas_set_runtime_params() 21 struct dsa_switch *ds = priv->ds; in sja1105_tas_set_runtime_params() 28 tas_data->enabled = false; in sja1105_tas_set_runtime_params() 30 for (port = 0; port < ds->num_ports; port++) { in sja1105_tas_set_runtime_params() 33 offload = tas_data->offload[port]; in sja1105_tas_set_runtime_params() 37 tas_data->enabled = true; in sja1105_tas_set_runtime_params() [all …]
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/openbmc/openbmc/meta-facebook/meta-ventura/recipes-phosphor/state/phosphor-state-manager/ |
H A D | chassis-powercycle | 3 # Ventura RMC Sled Power Cycle 5 rmc-hsc-power-cycle() { 8 # REBOOT 0 Write a 1 to reboot. 10 …# RBT_DL 100 Configures Auto-Reboot turn-on Delay (tDL(RBT)) after the REBOOT bit is set to 1 20 ret1=$(i2cget -y -f 10 0x44) 21 ret2=$(i2cget -y -f 10 0x14) 23 if [[ "$ret1" =~ ^0x[0-9A-Fa-f]+$ ]]; then 25 i2cset -y -f 10 0x44 0xfd 0x00 26 i2cset -y -f 10 0x44 0xfd 0x0b 27 elif [[ "$ret2" =~ ^0x[0-9A-Fa-f]+$ ]]; then [all …]
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/openbmc/linux/tools/perf/pmu-events/arch/x86/elkhartlake/ |
H A D | pipeline.json | 6 "PEBS": "1", 14 "PEBS": "1", 22 "PEBS": "1", 30 "PEBS": "1", 38 "PEBS": "1", 46 "PEBS": "1", 54 "PEBS": "1", 62 "PEBS": "1", 70 "PEBS": "1", 78 "PEBS": "1", [all …]
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/openbmc/linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
H A D | pipeline.json | 6 "PEBS": "1", 14 "PEBS": "1", 22 "PEBS": "1", 30 "PEBS": "1", 38 "PEBS": "1", 46 "PEBS": "1", 54 "PEBS": "1", 62 "PEBS": "1", 70 "PEBS": "1", 78 "PEBS": "1", [all …]
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/openbmc/linux/kernel/locking/ |
H A D | test-ww_mutex.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Module-based API test facility for ww_mutexes 22 (a)->deadlock_inject_countdown = ~0U; \ 36 #define TEST_MTX_TRY BIT(1) 44 complete(&mtx->ready); in test_mutex_work() 45 wait_for_completion(&mtx->go); in test_mutex_work() 47 if (mtx->flags & TEST_MTX_TRY) { in test_mutex_work() 48 while (!ww_mutex_trylock(&mtx->mutex, NULL)) in test_mutex_work() 51 ww_mutex_lock(&mtx->mutex, NULL); in test_mutex_work() 53 complete(&mtx->done); in test_mutex_work() [all …]
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/openbmc/linux/tools/perf/pmu-events/arch/x86/alderlaken/ |
H A D | pipeline.json | 6 "PEBS": "1", 12 "Deprecated": "1", 15 "PEBS": "1", 23 "PEBS": "1", 31 "PEBS": "1", 39 "PEBS": "1", 47 "PEBS": "1", 55 "PEBS": "1", 61 "Deprecated": "1", 64 "PEBS": "1", [all …]
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/openbmc/linux/tools/perf/pmu-events/arch/x86/amdzen1/ |
H A D | floating-point.json | 5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.", 6 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.", 13 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.", 20 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.", 27 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.", 34 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… [all …]
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/openbmc/linux/sound/firewire/ |
H A D | amdtp-stream.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Audio and Music Data Transmission Protocol (IEC 61883-6) streams 4 * with Common Isochronous Packet (IEC 61883-1) headers 12 #include <linux/firewire-constants.h> 17 #include "amdtp-stream.h" 27 #include "amdtp-stream-trace.h" 34 #define TAG_CIP 1 39 #define CIP_EOH (1u << CIP_EOH_SHIFT) 83 * amdtp_stream_init - initialize an AMDTP stream structure 87 * @flags: the details of the streaming protocol consist of cip_flags enumeration-constants. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | renesas,sh-msiof.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 13 - $ref: spi-controller.yaml# 18 - items: 19 - const: renesas,msiof-sh73a0 # SH-Mobile AG5 20 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible 22 - items: [all …]
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/openbmc/linux/tools/perf/pmu-events/arch/s390/cf_z10/ |
H A D | basic.json | 3 "Unit": "CPU-M-CF", 6 "BriefDescription": "Cycle Count", 10 "Unit": "CPU-M-CF", 11 "EventCode": "1", 17 "Unit": "CPU-M-CF", 20 "BriefDescription": "Level-1 I-Cache Directory Write Count", 21 …Description": "This counter counts the total number of level-1 instruction-cache or unified-cache … 24 "Unit": "CPU-M-CF", 27 "BriefDescription": "Level-1 I-Cache Penalty Cycle Count", 28 …"PublicDescription": "This counter counts the total number of cache penalty cycles for level-1 ins… [all …]
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/openbmc/linux/tools/perf/pmu-events/arch/s390/cf_z13/ |
H A D | basic.json | 3 "Unit": "CPU-M-CF", 6 "BriefDescription": "Cycle Count", 10 "Unit": "CPU-M-CF", 11 "EventCode": "1", 17 "Unit": "CPU-M-CF", 20 "BriefDescription": "Level-1 I-Cache Directory Write Count", 21 …Description": "This counter counts the total number of level-1 instruction-cache or unified-cache … 24 "Unit": "CPU-M-CF", 27 "BriefDescription": "Level-1 I-Cache Penalty Cycle Count", 28 …"PublicDescription": "This counter counts the total number of cache penalty cycles for level-1 ins… [all …]
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