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Searched +full:coreclk +full:- +full:mux (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/clk/sifive/
H A Dsifive-prci.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "sifive-prci.h"
11 #include "fu540-prci.h"
12 #include "fu740-prci.h"
19 * __prci_readl() - read from a PRCI register
33 return readl_relaxed(pd->va + offs); in __prci_readl()
38 writel_relaxed(v, pd->va + offs); in __prci_writel()
41 /* WRPLL-related private functions */
44 * __prci_wrpll_unpack() - unpack WRPLL configuration registers into parameters
63 c->divr = v; in __prci_wrpll_unpack()
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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqoriq-clock.txt14 --------------- -------------
21 - compatible: Should contain a chip-specific clock block compatible
22 string and (if applicable) may contain a chassis-version clock
25 Chip-specific strings are of the form "fsl,<chip>-clockgen", such as:
26 * "fsl,p2041-clockgen"
27 * "fsl,p3041-clockgen"
28 * "fsl,p4080-clockgen"
29 * "fsl,p5020-clockgen"
30 * "fsl,p5040-clockgen"
31 * "fsl,t1023-clockgen"
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/openbmc/u-boot/drivers/clk/sifive/
H A Dfu540-prci.c1 // SPDX-License-Identifier: GPL-2.0
19 * FU540-C000 chip. This driver assumes that it has sole control
25 * https://github.com/riscv/riscv-linux
28 * - SiFive FU540-C000 manual v1p0, Chapter 7 "Clocking and Reset"
32 #include <clk-uclass.h>
40 #include <dt-bindings/clk/sifive-fu540-prci.h>
42 #include "analogbits-wrpll-cln28hpc.h"
155 * struct __prci_data - per-device-instance data
159 * PRCI per-device instance data
167 * struct __prci_wrpll_data - WRPLL configuration and integration data
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/openbmc/linux/Documentation/devicetree/bindings/soc/ti/
H A Dti,pruss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
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/openbmc/linux/drivers/soc/ti/
H A Dpruss.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PRU-ICSS platform driver for various TI SoCs
5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - http://www.ti.com/
7 * Suman Anna <s-anna@ti.com>
9 * Tero Kristo <t-kristo@ti.com>
12 #include <linux/clk-provider.h>
13 #include <linux/dma-mapping.h>
29 * struct pruss_private_data - PRUSS driver private data
39 * pruss_get() - get the pruss for a given PRU remoteproc
53 * -EINVAL if invalid parameter
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/openbmc/linux/drivers/clk/
H A Dclk-qoriq.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <linux/clk-provider.h>
33 #define CGA_PLL4 4 /* only on clockgen-1.0, which lacks CGB */
82 int cmux_to_group[NUM_CMUX + 1]; /* array should be -1 terminated */
91 struct clk *sysclk, *coreclk; member
104 if (cg->info.flags & CG_LITTLE_ENDIAN) in cg_out()
114 if (cg->info.flags & CG_LITTLE_ENDIAN) in cg_in()
473 reg = ioread32be(&cg->guts->rcwsr[7]); in p2041_init_periph()
476 cg->fman[0] = cg->pll[CGA_PLL2].div[PLL_DIV2].clk; in p2041_init_periph()
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/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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H A Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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H A Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
11 #include "k3-serdes.h"
14 cmn_refclk: clock-cmnrefclk {
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
17 clock-frequency = <0>;
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