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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos5433-clock.yaml30 # CMU_CPIF which generates clocks for LLI (Low Latency Interface) IP
521 <&cmu_cpif CLK_SCLK_MPHY_PLL>,
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433.dtsi378 <&cmu_cpif CLK_SCLK_MPHY_PLL>,
383 cmu_cpif: clock-controller@10fc0000 { label
400 <&cmu_cpif CLK_SCLK_MPHY_PLL>;
431 <&cmu_cpif CLK_SCLK_UFS_MPHY>,
/openbmc/linux/include/dt-bindings/clock/
H A Dexynos5433.h191 /* CMU_CPIF */
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5433.c839 * Register offset definitions for CMU_CPIF