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/openbmc/qemu/hw/core/
H A Dqdev-clock.c2 * Device's clock input and output
4 * Copyright GreenSocs 2016-2020
11 * See the COPYING file in the top-level directory.
15 #include "qemu/error-report.h"
16 #include "hw/qdev-clock.h"
17 #include "hw/qdev-core.h"
22 * Add a new clock in a device
24 static NamedClockList *qdev_init_clocklist(DeviceState *dev, const char *name, in qdev_init_clocklist() argument
25 bool output, Clock *clk) in qdev_init_clocklist() argument
30 * Clock must be added before realize() so that we can compute the in qdev_init_clocklist()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dxgene.txt1 Device Tree Clock bindings for APM X-Gene
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible : shall be one of the following:
9 "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
10 "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
11 "apm,xgene-pmd-clock" - for a X-Gene PMD clock
12 "apm,xgene-device-clock" - for a X-Gene device clock
13 "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
14 "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
[all …]
H A Dmoxa,moxart-clock.txt1 Device Tree Clock bindings for arch-moxart
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
7 MOXA ART SoCs allow to determine PLL output and APB frequencies
14 - compatible : Must be "moxa,moxart-pll-clock"
15 - #clock-cells : Should be 0
16 - reg : Should contain registers location and length
17 - clocks : Should contain phandle + clock-specifier for the parent clock
20 - clock-output-names : Should contain clock name
26 - compatible : Must be "moxa,moxart-apb-clock"
[all …]
/openbmc/qemu/include/hw/
H A Dqdev-clock.h2 * Device's clock input and output
4 * Copyright GreenSocs 2016-2020
11 * See the COPYING file in the top-level directory.
17 #include "hw/clock.h"
21 * @dev: the device to add an input clock to
22 * @name: the name of the clock (can't be NULL).
27 * @returns: a pointer to the newly added clock
29 * Add an input clock to device @dev as a clock named @name.
33 Clock *qdev_init_clock_in(DeviceState *dev, const char *name,
39 * @dev: the device to add an output clock to
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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun8i-r40-tcon-top.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV
17 encoder clock source and contains additional TV TCON and DSI gates.
22 / [0] TCON-LCD0
25 \ / [1] TCON-LCD1 - LCD1/LVDS1
[all …]
/openbmc/linux/drivers/clk/at91/
H A Ddt-compat.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
33 const char *name = np->name; in of_sama5d2_clk_audio_pll_frac_setup() local
46 hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_frac_setup()
53 "atmel,sama5d2-clk-audio-pll-frac",
59 const char *name = np->name; in of_sama5d2_clk_audio_pll_pad_setup() local
72 hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pad_setup()
79 "atmel,sama5d2-clk-audio-pll-pad",
85 const char *name = np->name; in of_sama5d2_clk_audio_pll_pmc_setup() local
98 hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pmc_setup()
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/openbmc/linux/drivers/clk/ti/
H A Dadpll.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/clk-provider.h>
177 const char *name; in ti_adpll_clk_get_name() local
181 err = of_property_read_string_index(d->np, in ti_adpll_clk_get_name()
182 "clock-output-names", in ti_adpll_clk_get_name()
184 &name); in ti_adpll_clk_get_name()
188 name = devm_kasprintf(d->dev, GFP_KERNEL, "%08lx.adpll.%s", in ti_adpll_clk_get_name()
189 d->pa, postfix); in ti_adpll_clk_get_name()
192 return name; in ti_adpll_clk_get_name()
197 static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock, in ti_adpll_setup_clock() argument
[all …]
H A Dclk.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI clock support
7 * Tero Kristo <t-kristo@ti.com>
11 #include <linux/clk-provider.h>
23 #include "clock.h"
43 struct clk_iomap *io = clk_memmaps[reg->index]; in clk_memmap_writel()
45 if (reg->ptr) in clk_memmap_writel()
46 writel_relaxed(val, reg->ptr); in clk_memmap_writel()
47 else if (io->regmap) in clk_memmap_writel()
48 regmap_write(io->regmap, reg->offset, val); in clk_memmap_writel()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dx-powers,ac100.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/x-powers,ac100.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: X-Powers AC100
10 - Chen-Yu Tsai <wens@csie.org>
14 const: x-powers,ac100
23 "#clock-cells":
27 const: x-powers,ac100-codec
32 clock-output-names:
[all …]
H A Drockchip,rk809.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk809
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
34 clock-output-names:
36 From common clock binding to override the default output clock name.
[all …]
H A Drockchip,rk805.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk805
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
34 clock-output-names:
36 From common clock binding to override the default output clock name.
[all …]
H A Drockchip,rk817.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
21 - rockchip,rk817
29 '#clock-cells':
31 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
35 clock-output-names:
37 From common clock binding to override the default output clock name.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/ti/davinci/
H A Dpll.txt5 an multiplexers for various clock signals.
8 - compatible: shall be one of:
9 - "ti,da850-pll0" for PLL0 on DA850/OMAP-L138/AM18XX
10 - "ti,da850-pll1" for PLL1 on DA850/OMAP-L138/AM18XX
11 - reg: physical base address and size of the controller's register area.
12 - clocks: phandles corresponding to the clock names
13 - clock-names: names of the clock sources - depends on compatible string
14 - for "ti,da850-pll0", shall be "clksrc", "extclksrc"
15 - for "ti,da850-pll1", shall be "clksrc"
18 - ti,clkmode-square-wave: Indicates that the board is supplying a square
[all …]
/openbmc/linux/drivers/media/platform/qcom/camss/
H A Dcamss-vfe.c1 // SPDX-License-Identifier: GPL-2.0
3 * camss-vfe.c
5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
20 #include <media/media-entity.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-subdev.h>
24 #include "camss-vfe.h"
127 * vfe_get_bpp - map media bus format to bits per pixel
[all …]
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-counter3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
13 Selects the external clock pin for phase counting mode of
16 MTCLKA-MTCLKB:
18 phase clock.
20 MTCLKC-MTCLKD:
22 phase clock.
26 Contact: linux-iio@vger.kernel.org
33 Contact: linux-iio@vger.kernel.org
39 Contact: linux-iio@vger.kernel.org
[all …]
/openbmc/linux/tools/perf/tests/shell/
H A Ddaemon.sh3 # SPDX-License-Identifier: GPL-2.0
8 local name=$2
10 local output=$4
25 if [ "${name}" != "${line_name}" ]; then
26 echo "FAILED: wrong name"
35 if [ "${output}" != "${line_output}" ]; then
36 echo "FAILED: wrong output"
54 local name=$2
57 local output=$5
77 if [ "${name}" != "${line_name}" ]; then
[all …]
/openbmc/qemu/include/hw/misc/
H A Dnpcm7xx_clk.h2 * Nuvoton NPCM7xx Clock Control Registers.
20 #include "hw/clock.h"
29 #define NPCM7XX_WATCHDOG_RESET_GPIO_IN "npcm7xx-clk-watchdog-reset-gpio-in"
31 /* Maximum amount of clock inputs in a SEL module. */
86 * struct NPCM7xxClockPLLState - A PLL module in CLK module.
87 * @name: The name of the module.
89 * @clock_in: The input clock of this module.
90 * @clock_out: The output clock of this module.
96 const char *name; member
98 Clock *clock_in;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-inno-hdmi.txt4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rk3228-hdmi-phy",
6 * "rockchip,rk3328-hdmi-phy";
7 - reg : Address and length of the hdmi phy control register set
8 - clocks : phandle + clock specifier for the phy clocks
9 - clock-names : string, clock name, must contain "sysclk" for system
10 control and register configuration, "refoclk" for crystal-
11 oscillator reference PLL clock input and "refpclk" for pclk-
12 based refeference PLL clock input.
13 - #clock-cells: should be 0.
[all …]
/openbmc/linux/drivers/comedi/drivers/
H A Damplc_dio200.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
9 * COMEDI - Linux Control and Measurement Device Interface
24 * [0] - I/O port base address
25 * [1] - IRQ (optional, but commands won't work without it)
32 * ------------- ------------- -------------
34 * 0 PPI-X PPI-X PPI-X
35 * 1 CTR-Y1 PPI-Y PPI-Y
36 * 2 CTR-Y2 CTR-Z1* CTR-Z1
37 * 3 CTR-Z1 INTERRUPT* CTR-Z2
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3288-miqi.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
14 ext_gmac: external-gmac-clock {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <125000000>;
18 clock-output-names = "ext_gmac";
21 io_domains: io-domains {
22 compatible = "rockchip,rk3288-io-voltage-domain";
25 audio-supply = <&vcca_33>;
26 flash0-supply = <&vcc_flash>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Drt5682.txt7 - compatible : "realtek,rt5682" or "realtek,rt5682i"
9 - reg : The I2C address of the device.
11 - AVDD-supply: phandle to the regulator supplying analog power through the
14 - MICVDD-supply: phandle to the regulator supplying power for the microphone
17 - VBAT-supply: phandle to the regulator supplying battery power through the
20 - DBVDD-supply: phandle to the regulator supplying I/O power through the DBVDD
23 - LDO1-IN-supply: phandle to the regulator supplying power to the digital core
28 - interrupts : The CODEC's interrupt output.
30 - realtek,dmic1-data-pin
35 - realtek,dmic1-clk-pin
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc_flash";
[all …]
H A Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
H A Drk3288-r89.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/pwm/pwm.h>
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "ext_gmac";
24 #clock-cells = <0>;
27 gpio-keys {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/leds/
H A Dleds-lp55xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
30 - ti,lp5562
[all …]

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