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/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
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/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
28 gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
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H A Dstm32mp15xx-dhcom-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
23 stdout-path = "serial0:115200n8";
31 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
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H A Dstm32mp157a-stinger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
24 stdout-path = "serial1:115200n8";
33 compatible = "gpio-leds";
37 gpios = <&gpioa 13 GPIO_ACTIVE_HIGH>;
38 linux,default-trigger = "heartbeat";
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H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
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H A Dstm32mp157c-ed1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/st,stpmic1.h>
17 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
24 stdout-path = "serial0:115200n8";
32 reserved-memory {
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/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157c-ed1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
9 #include "stm32mp157-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/mfd/st,stpmu1.h>
15 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
18 stdout-path = "serial3:115200n8";
25 sd_switch: regulator-sd_switch {
26 compatible = "regulator-gpio";
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/openbmc/linux/drivers/mmc/host/
H A Dmmci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
6 * Copyright (C) 2010 ST-Ericsson SA
26 #include <linux/mmc/slot-gpio.h>
33 #include <linux/dma-mapping.h>
47 #define DRIVER_NAME "mmci-pl18x"
373 spin_lock_irqsave(&host->lock, flags); in mmci_card_busy()
374 if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag) in mmci_card_busy()
376 spin_unlock_irqrestore(&host->lock, flags); in mmci_card_busy()
390 if (host->cclk < 25000000) in mmci_reg_delay()
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/openbmc/u-boot/drivers/mmc/
H A Dstm32_sdmmc2.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
201 data_ctrl = (__ilog2(data->blocksize) << in stm32_sdmmc2_start_data()
205 if (data->flags & MMC_DATA_READ) { in stm32_sdmmc2_start_data()
207 idmabase0 = (u32)data->dest; in stm32_sdmmc2_start_data()
209 idmabase0 = (u32)data->src; in stm32_sdmmc2_start_data()
213 writel(SDMMC_CMD_TIMEOUT, priv->base + SDMMC_DTIMER); in stm32_sdmmc2_start_data()
216 writel(ctx->data_length, priv->base + SDMMC_DLEN); in stm32_sdmmc2_start_data()
219 writel(data_ctrl, priv->base + SDMMC_DCTRL); in stm32_sdmmc2_start_data()
222 ctx->cache_start = rounddown(idmabase0, ARCH_DMA_MINALIGN); in stm32_sdmmc2_start_data()
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