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/openbmc/linux/fs/afs/
H A Dvl_rotate.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 bool afs_begin_vlserver_operation(struct afs_vl_cursor *vc, struct afs_cell *cell, in afs_begin_vlserver_operation() argument
21 vc->cell = cell; in afs_begin_vlserver_operation()
22 vc->key = key; in afs_begin_vlserver_operation()
23 vc->error = -EDESTADDRREQ; in afs_begin_vlserver_operation()
24 vc->ac.error = SHRT_MAX; in afs_begin_vlserver_operation()
27 vc->error = -EINTR; in afs_begin_vlserver_operation()
28 vc->flags |= AFS_VL_CURSOR_STOP; in afs_begin_vlserver_operation()
41 struct afs_cell *cell = vc->cell; in afs_start_vl_iteration() local
44 if (cell->dns_source == DNS_RECORD_UNAVAILABLE || in afs_start_vl_iteration()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
[all …]
H A Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
H A Dfsl,fman-dtsec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Madalin Bucur <madalin.bucur@nxp.com>
15 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller
22 - fsl,fman-dtsec
23 - fsl,fman-xgec
24 - fsl,fman-memac
26 cell-index:
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dqoriq-qman-portals.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2011-2016 Freescale Semiconductor Inc.
10 #address-cells = <1>;
11 #size-cells = <1>;
12 compatible = "simple-bus";
14 qportal0: qman-portal@0 {
16 * bootloader fix-ups are expected to provide the
17 * "fsl,bman-portal-<hardware revision>" compatible
19 compatible = "fsl,qman-portal";
22 cell-index = <0>;
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H A Dqoriq-fman3-0.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
9 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 cell-index = <0>;
21 clock-names = "fmanclk";
22 fsl,qman-channel-range = <0x800 0x10>;
23 ptimer-handle = <&ptp_timer0>;
24 dma-coherent;
[all …]
/openbmc/linux/drivers/of/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0
7 * of_get_cpu_hwid - Get the hardware ID from a CPU device node
9 * @cpun: CPU number(logical index) for which device node is required
16 const __be32 *cell; in of_get_cpu_hwid() local
20 cell = of_get_property(cpun, "reg", &len); in of_get_cpu_hwid()
21 if (!cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len)) in of_get_cpu_hwid()
24 cell += ac * thread; in of_get_cpu_hwid()
25 return of_read_number(cell, ac); in of_get_cpu_hwid()
29 * arch_match_cpu_phys_id - Match the given logical CPU and physical id
31 * @cpu: logical cpu index of a core/thread
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/openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-qman1-portals.dtsi4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "simple-bus";
40 qportal0: qman-portal@0 {
41 compatible = "fsl,qman-portal";
44 cell-index = <0x0>;
46 qportal1: qman-portal@4000 {
47 compatible = "fsl,qman-portal";
50 cell-index = <1>;
[all …]
H A Dt4240si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
53 compatible = "fsl,ifc", "simple-bus";
[all …]
H A Dqoriq-fman-1.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x60 0xc>;
46 ptimer-handle = <&ptp_timer1>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x1>;
55 compatible = "fsl,fman-v2-port-oh";
[all …]
H A Dqoriq-fman-0.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x40 0xc>;
46 ptimer-handle = <&ptp_timer0>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x1>;
55 compatible = "fsl,fman-v2-port-oh";
[all …]
H A Db4860si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 /include/ "b4si-post.dtsi"
39 compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
45 #address-cells = <2>;
46 #size-cells = <2>;
47 fsl,iommu-parent = <&pamu0>;
51 #address-cells = <2>;
52 #size-cells = <2>;
53 cell-index = <1>;
57 #address-cells = <2>;
[all …]
H A Dqoriq-fman3-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x820 0x10>;
46 ptimer-handle = <&ptp_timer1>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x2>;
55 compatible = "fsl,fman-v3-port-oh";
[all …]
H A Dqoriq-fman3-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x800 0x10>;
46 ptimer-handle = <&ptp_timer0>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x2>;
55 compatible = "fsl,fman-v3-port-oh";
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dfsp2.dts12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = <0>; /* Filled in by cuboot */
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
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H A Dasp834x-redboot.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 compatible = "analogue-and-micro,asp8347e";
13 #address-cells = <1>;
14 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <32768>;
[all …]
H A Dmpc8349emitxgp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC8349E-mITX-GP Device Tree Source
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <32768>;
[all …]
H A Dmpc836x_rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2007-2008 MontaVista Software, Inc.
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
[all …]
H A Dtqm8540.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
[all …]
H A Dmpc8313erdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <16384>;
34 i-cache-size = <16384>;
[all …]
/openbmc/u-boot/lib/
H A Dfdtdec.c1 // SPDX-License-Identifier: GPL-2.0+
30 * good reason why driver-model conversion is infeasible. Examples include
36 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
37 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
38 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
39 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
40 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
42 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
43 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
44 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
[all …]
/openbmc/linux/drivers/nvmem/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
16 #include <linux/nvmem-consumer.h>
17 #include <linux/nvmem-provider.h>
44 int index; member
64 if (nvmem->reg_read) in __nvmem_reg_read()
65 return nvmem->reg_read(nvmem->priv, offset, val, bytes); in __nvmem_reg_read()
67 return -EINVAL; in __nvmem_reg_read()
75 if (nvmem->reg_write) { in __nvmem_reg_write()
76 gpiod_set_value_cansleep(nvmem->wp_gpio, 0); in __nvmem_reg_write()
[all …]
/openbmc/qemu/hw/misc/
H A Dmips_itu.c2 * Inter-Thread Communication Unit emulation.
27 #include "hw/qdev-properties.h"
73 return &itu->tag_io; in mips_itu_get_tag_region()
79 uint64_t index = addr >> 3; in itc_tag_read() local
81 if (index >= ITC_ADDRESSMAP_NUM) { in itc_tag_read()
86 return tag->ITCAddressMap[index]; in itc_tag_read()
91 uint64_t *am = &tag->ITCAddressMap[0]; in itc_reconfigure()
92 MemoryRegion *mr = &tag->storage_io; in itc_reconfigure()
98 if (!(size & (size - 1))) { in itc_reconfigure()
110 uint64_t *am = &tag->ITCAddressMap[0]; in itc_tag_write()
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/openbmc/linux/Documentation/devicetree/bindings/mips/cavium/
H A Dbootbus.txt7 - compatible: "cavium,octeon-3860-bootbus"
11 - reg: The base address of the Boot Bus' register bank.
13 - #address-cells: Must be <2>. The first cell is the chip select
14 within the bootbus. The second cell is the offset from the chip select.
16 - #size-cells: Must be <1>.
18 - ranges: There must be one one triplet of (child-bus-address,
19 parent-bus-address, length) for each active chip select. If the
27 - compatible: "cavium,octeon-3860-bootbus-config"
29 - cavium,cs-index: A single cell indicating the chip select that
32 - cavium,t-adr: A cell specifying the ADR timing (in nS).
[all …]

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