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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drockchip-pinconf.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /omit-if-no-ref/
8 pcfg_pull_up: pcfg-pull-up {
9 bias-pull-up;
12 /omit-if-no-ref/
13 pcfg_pull_down: pcfg-pull-down {
14 bias-pull-down;
17 /omit-if-no-ref/
18 pcfg_pull_none: pcfg-pull-none {
19 bias-disable;
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8960-samsung-expressatt.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
4 #include "qcom-msm8960.dtsi"
5 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
8 model = "Samsung Galaxy Express SGH-I437";
10 chassis-type = "handset";
19 stdout-path = "serial0:115200n8";
33 vmmc-supply = <&pm8921_l5>;
38 vmmc-supply = <&pm8921_l6>;
39 vqmmc-supply = <&pm8921_l7>;
[all …]
H A Dqcom-msm8960-cdp.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
4 #include "qcom-msm8960.dtsi"
8 compatible = "qcom,msm8960-cdp", "qcom,msm8960";
15 stdout-path = "serial0:115200n8";
18 ext_l2: gpio-regulator {
19 compatible = "regulator-fixed";
20 regulator-name = "ext_l2";
22 startup-delay-us = <10000>;
23 enable-active-high;
[all …]
H A Dqcom-apq8064-sony-xperia-lagan-yuga.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 compatible = "sony,xperia-yuga", "qcom,apq8064";
11 chassis-type = "handset";
18 stdout-path = "serial0:115200n8";
21 gpio-keys {
[all …]
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
7 #include "qcom-msm8660.dtsi"
11 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
18 stdout-path = "serial0:115200n8";
22 vph: regulator-fixed {
[all …]
H A Dqcom-apq8064-asus-nexus7-flo.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
8 compatible = "asus,nexus7-flo", "qcom,apq8064";
9 chassis-type = "tablet";
17 stdout-path = "serial0:115200n8";
20 reserved-memory {
21 #address-cells = <1>;
[all …]
H A Dqcom-mdm9615.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
13 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
15 #include <dt-bindings/mfd/qcom-rpm.h>
16 #include <dt-bindings/soc/qcom,gsbi.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
H A Dqcom-apq8064-ifc6410.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
9 compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
22 stdout-path = "serial0:115200n8";
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&notify_led>;
[all …]
H A Dqcom-apq8064-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 sdc4_gpios: sdc4-gpios {
11 sdcc1_pins: sdcc1-pin-active {
14 drive-strengh = <16>;
15 bias-disable;
20 drive-strengh = <10>;
21 bias-pull-up;
26 drive-strengh = <10>;
27 bias-pull-up;
31 sdcc3_pins: sdcc3-pin-active {
[all …]
H A Dqcom-apq8064-cm-qs600.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 model = "CompuLab CM-QS600";
8 compatible = "qcom,apq8064-cm-qs600", "qcom,apq8064";
15 stdout-path = "serial0:115200n8";
18 sdcc4_pwrseq: pwrseq-sdcc4 {
19 pinctrl-names = "default";
20 pinctrl-0 = <&wlan_default_gpios>;
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-href-ab8500.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "ste-ab8500.dtsi"
14 pinctrl-names = "default";
15 pinctrl-0 = <&gpio2_default_mode>,
41 * are muxed in as GPIO, and configured as INPUT PULL DOWN
51 input-enable;
52 bias-pull-down;
64 input-enable;
65 bias-pull-down;
77 input-enable;
[all …]
H A Dstm32mp13-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
16 i2c1_pins_a: i2c1-0 {
20 bias-disable;
21 drive-open-drain;
22 slew-rate = <0>;
26 i2c1_sleep_pins_a: i2c1-sleep-0 {
33 i2c5_pins_a: i2c5-0 {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dti,da850-pupd.txt1 * Pin configuration for TI DA850/OMAP-L138/AM18x
3 These SoCs have a separate controller for setting bias (internal pullup/down).
4 Bias can only be selected for groups rather than individual pins.
8 - compatible: Must be "ti,da850-pupd"
9 - reg: Base address and length of the memory resource used by the pullup/down
17 - groups: An array of strings, each string containing the name of a pin group.
21 pinctrl-bindings.txt in this directory. The supported parameters are
22 bias-disable, bias-pull-up, bias-pull-down.
26 -------
30 pinconf: pin-controller@22c00c {
[all …]
H A Dmediatek,mt8195-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8195-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
32 gpio-line-names: true
[all …]
H A Dmediatek,mt8186-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8186-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
31 gpio-line-names: true
[all …]
H A Dmediatek,mt6795-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 - Sean Wang <sean.wang@kernel.org>
18 const: mediatek,mt6795-pinctrl
20 gpio-controller: true
22 '#gpio-cells':
29 gpio-ranges:
[all …]
H A Dsprd,pinctrl.txt16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
54 "sprd,sleep-mode" property to set pin sleep mode.
58 configure drive strength, pull up/down and so on. Especially for pull
[all …]
H A Dmediatek,mt8188-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hui Liu <hui.liu@mediatek.com>
17 const: mediatek,mt8188-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
25 are defined in <dt-bindings/gpio/gpio.h>.
28 gpio-ranges:
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-idp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi"
25 max98360a: audio-codec-0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&amp_en>;
29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30 #sound-dai-cells = <0>;
[all …]
H A Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include "sc7180-firmware-tfa.dtsi"
20 compatible = "qcom,sc7180-idp", "qcom,sc7180";
30 stdout-path = "serial0:115200n8";
42 /delete-node/ &hyp_mem;
43 /delete-node/ &xbl_mem;
[all …]
H A Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "sc7180-firmware-tfa.dtsi"
22 thermal-zones {
23 charger_thermal: charger-thermal {
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc4357-myd-lpc4357.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel
5 * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
8 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "myir,myd-lpc4357", "nxp,lpc4357";
20 stdout-path = "serial3:115200n8";
29 compatible = "gpio-leds";
30 pinctrl-names = "default";
31 pinctrl-0 = <&led_pins>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
H A Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
27 stdout-path = "serial0:921600n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 compatible = "shared-dma-pool";
37 no-map;
[all …]
H A Dmt8365-evk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 BayLibre, SAS.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/mt8365-pinfunc.h>
19 compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
26 stdout-path = "serial0:921600n8";
31 compatible = "linaro,optee-tz";
36 gpio-keys {
[all …]

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