/openbmc/linux/Documentation/ |
H A D | memory-barriers.txt | 2 LINUX KERNEL MEMORY BARRIERS 16 meant as a guide to using the various memory barriers provided by Linux, but 31 (2) to provide a guide as to how to use the barriers that are available. 51 (*) What are memory barriers? 54 - What may not be assumed about memory barriers? 55 - Address-dependency barriers (historical). 59 - Read memory barriers vs load speculation. 62 (*) Explicit kernel barriers. 65 - CPU memory barriers. 67 (*) Implicit kernel memory barriers. [all …]
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H A D | atomic_t.txt | 54 Barriers: 160 ORDERING (go read memory-barriers.txt first) 188 The barriers: 193 ordering inherent to the op. These barriers act almost like a full smp_mb(): 201 These helper barriers exist because architectures have varying implicit 203 provide full ordered atomics and these barriers are no-ops.
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H A D | atomic_bitops.txt | 28 Barriers: 68 the same barriers as for atomic_t are used, see atomic_t.txt.
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/openbmc/linux/Documentation/core-api/wrappers/ |
H A D | memory-barriers.rst | 2 This is a simple wrapper to bring memory-barriers.txt into the RST world 6 Linux kernel memory barriers 13 .. include:: ../../memory-barriers.txt
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/openbmc/linux/arch/mips/include/asm/ |
H A D | sync.h | 13 * 1) Completion barriers, which ensure that a memory operation has actually 16 * 2) Ordering barriers, which only ensure that affected memory operations 20 * Ordering barriers can be more efficient than completion barriers, since: 22 * a) Ordering barriers only require memory access instructions which preceed 57 * we're satisfied that lightweight ordering barriers defined by MIPSr6 are 66 * barrier since 2010 & omit 'rmb' barriers because the CPUs don't perform
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/openbmc/linux/include/linux/ |
H A D | virtio_ring.h | 10 * Barriers in virtio are tricky. Non-SMP virtio guests can't assume 12 * barriers. Non-SMP virtio hosts could skip the barriers, but does 20 * CPUs) we do need real barriers. In theory, we could be using both
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H A D | atomic.h | 25 * See Documentation/memory-barriers.txt for ACQUIRE/RELEASE definitions. 36 * barriers on top of the relaxed variant. In the case where the relaxed 37 * variant is already fully ordered, no additional barriers are needed.
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/openbmc/qemu/docs/devel/ |
H A D | atomics.rst | 18 a very low level approach to concurrency, involving memory barriers 26 - compiler barriers: ``barrier()``; 28 - weak atomic access and manual memory barriers: ``qatomic_read()``, 39 atomic operations and memory barriers should be limited to inter-thread 54 case, ``qemu/atomic.h`` will reduce stronger memory barriers to simple 55 compiler barriers. 111 Weak atomic access and manual memory barriers 159 Memory barriers control the order of references to shared memory. 218 also be compiler barriers only. 220 Memory barriers and ``qatomic_load_acquire``/``qatomic_store_release`` are [all …]
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H A D | multi-thread-tcg.rst | 257 Memory Barriers 260 Barriers (sometimes known as fences) provide a mechanism for software 266 …/git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/plain/Documentation/memory-barriers.txt>`_ 270 Barriers are often wrapped around synchronisation primitives to 293 DESIGN REQUIREMENTS: Be efficient with use of memory barriers 294 - host systems with stronger implied guarantees can skip some barriers 295 - merge consecutive barriers to the strongest one 301 tcg_optimize() function attempts to merge barriers up to their
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/openbmc/linux/tools/memory-model/Documentation/ |
H A D | ordering.txt | 11 1. Barriers (also known as "fences"). A barrier orders some or 30 Barriers 33 Each of the following categories of barriers is described in its own 36 a. Full memory barriers. 38 b. Read-modify-write (RMW) ordering augmentation barriers. 55 Full Memory Barriers 126 RMW Ordering Augmentation Barriers 238 Note that the barriers discussed previously use barrier() or its low-level 265 improved readability and performance compared to explicit barriers. 324 and readability compared to explicit barriers. For example, use of [all …]
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/openbmc/linux/tools/testing/selftests/bpf/benchs/ |
H A D | bench_htab_mem.c | 106 pthread_barrier_t *barriers; in htab_mem_bench_init_barriers() local 113 barriers = calloc(nr, sizeof(*barriers)); in htab_mem_bench_init_barriers() 114 if (!barriers) in htab_mem_bench_init_barriers() 119 pthread_barrier_init(&barriers[i], NULL, 2); in htab_mem_bench_init_barriers() 121 ctx.notify = barriers; in htab_mem_bench_init_barriers()
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/openbmc/linux/drivers/gpu/drm/i915/gt/ |
H A D | selftest_context.c | 70 /* Wait for all barriers to complete (remote CPU) before we check */ in context_sync() 214 * In GuC submission mode we don't use idle barriers and we instead in __live_active_context() 270 /* Now make sure our idle-barriers are flushed */ in __live_active_context() 291 "%s is still awake:%d after idle-barriers\n", in __live_active_context() 362 * Check that our idle barriers do not interfere with normal in __live_remote_context() 368 * In GuC submission mode we don't use idle barriers. in __live_remote_context()
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/openbmc/linux/Documentation/translations/sp_SP/wrappers/ |
H A D | memory-barriers.rst | 2 This is a simple wrapper to bring memory-barriers.txt (Spanish 14 .. include:: ../memory-barriers.txt
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/openbmc/linux/include/asm-generic/bitops/ |
H A D | instrumented-atomic.h | 21 * This is a relaxed atomic operation (no implied memory barriers). 37 * This is a relaxed atomic operation (no implied memory barriers). 50 * This is a relaxed atomic operation (no implied memory barriers).
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/openbmc/linux/Documentation/core-api/ |
H A D | circular-buffers.rst | 15 (2) Memory barriers for when the producer and the consumer of objects in the 29 (*) Using memory barriers with circular buffers. 134 Using memory barriers with circular buffers 137 By using memory barriers in conjunction with circular buffers, you can avoid 236 See also Documentation/memory-barriers.txt for a description of Linux's memory
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/openbmc/linux/tools/virtio/asm/ |
H A D | barrier.h | 15 /* Weak barriers should be used. If not - it's a bug */ 25 /* Weak barriers should be used. If not - it's a bug */
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/openbmc/linux/Documentation/virt/kvm/ |
H A D | vcpu-requests.rst | 179 [memory-barriers]_. 182 the memory barriers, allowing this requirement to be handled internally by 205 This solution also requires memory barriers to be placed carefully in both 206 the requesting thread and the receiving VCPU. With the memory barriers we 293 .. [memory-barriers] Documentation/memory-barriers.txt
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/openbmc/linux/drivers/soc/qcom/ |
H A D | kryo-l2-accessors.c | 21 * Use architecturally required barriers for ordering between system register 41 * Use architecturally required barriers for ordering between system register
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/openbmc/linux/Documentation/RCU/ |
H A D | lockdep.rst | 61 Use explicit check expression "c", and omit all barriers 66 Return the value of the pointer and omit all barriers, 101 all barriers and compiler constraints, it generates better code than do
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/openbmc/u-boot/arch/riscv/include/asm/ |
H A D | barrier.h | 21 /* These barriers need to enforce ordering on both devices or memory. */ 26 /* These barriers do not need to enforce ordering on devices, just memory. */
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/openbmc/linux/Documentation/arch/arm64/ |
H A D | legacy_instructions.rst | 27 instructions, .e.g., CP15 barriers 53 * CP15 Barriers
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/openbmc/linux/Documentation/admin-guide/ |
H A D | ext4.rst | 56 note that ext4 enables write barriers by default, while ext3 does 57 not enable write barriers by default. So it is useful to use 58 explicitly specify whether barriers are enabled or not when via the 59 '-o barriers=[0|1]' mount option for both ext3 and ext4 filesystems 199 This enables/disables the use of write barriers in the jbd code. 201 which can support barriers, and if jbd gets an error on a barrier 202 write, it will disable again with a warning. Write barriers enforce 205 battery-backed in one way or another, disabling barriers may safely 207 also be used to enable or disable barriers, for consistency with other
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/openbmc/linux/Documentation/translations/zh_CN/arch/arm64/ |
H A D | legacy_instructions.txt | 42 它是那些构架中正在被淘汰的指令,如 CP15 barriers(隔离指令),的默认处理方式。 61 * CP15 Barriers
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/openbmc/linux/drivers/staging/vc04_services/interface/ |
H A D | TODO | 36 * Review and comment memory barriers 38 There is a heavy use of memory barriers in this driver, it would be very
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/openbmc/linux/Documentation/translations/zh_TW/arch/arm64/ |
H A D | legacy_instructions.txt | 46 它是那些構架中正在被淘汰的指令,如 CP15 barriers(隔離指令),的默認處理方式。 65 * CP15 Barriers
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