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/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dmarvell,nand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell NAND Flash Controller (NFC)
10 - Miquel Raynal <miquel.raynal@bootlin.com>
15 - items:
16 - const: marvell,armada-8k-nand-controller
17 - const: marvell,armada370-nand-controller
18 - enum:
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/openbmc/u-boot/arch/arm/dts/
H A Darmada-cp110-master.dtsi4 * This file is dual-licensed: you can use it either under the terms
44 * Device Tree file for Marvell Armada CP110 Master.
47 #include <dt-bindings/comphy/comphy_data.h>
50 cp110-master {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 compatible = "simple-bus";
54 interrupt-parent = <&gic>;
57 config-space {
58 #address-cells = <1>;
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H A Darmada-cp110-slave.dtsi4 * This file is dual-licensed: you can use it either under the terms
44 * Device Tree file for Marvell Armada CP110 Slave.
47 #include <dt-bindings/comphy/comphy_data.h>
50 cp110-slave {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 compatible = "simple-bus";
54 interrupt-parent = <&gic>;
57 config-space {
58 #address-cells = <1>;
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/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-cp11x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Device Tree file for Marvell Armada CP11x.
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(ic-thermal) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
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/openbmc/linux/Documentation/devicetree/bindings/arm/marvell/
H A Dcp110-system-controller.txt1 Marvell Armada CP110 System Controller
4 The CP110 is one of the two core HW blocks of the Marvell Armada 7K/8K
6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
14 SYSTEM CONTROLLER 0
18 -------
20 The Device Tree node representing this System Controller 0 provides a
23 - a set of core clocks
24 - a set of gateable clocks
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/openbmc/u-boot/drivers/mtd/nand/raw/
H A DKconfig2 menuconfig NAND config
3 bool "Raw NAND Device Support"
4 if NAND
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
19 bool "Support Atmel NAND controller"
22 Enable this driver for NAND flash platforms using an Atmel NAND
23 controller.
36 The Programmable Multibit ECC (PMECC) controller is a programmable
44 Correctable ECC bits, can be 2, 4, 8, 12, and 24.
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/openbmc/linux/drivers/mtd/nand/raw/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Raw/Parallel NAND Device Support"
8 NAND flash devices. For further information see
9 <http://www.linux-mtd.infradead.org/doc/nand.html>.
13 comment "Raw/parallel NAND flash controllers"
19 tristate "Denali NAND controller on Intel Moorestown"
23 Enable the driver for NAND flash on Intel Moorestown, using the
24 Denali NAND controller core.
27 tristate "Denali NAND controller as a DT device"
31 Enable the driver for NAND flash on platforms using a Denali NAND
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H A Dmarvell_nand.c1 // SPDX-License-Identifier: GPL-2.0
3 * Marvell NAND flash controller driver
6 * Author: Miquel RAYNAL <miquel.raynal@free-electrons.com>
9 * This NAND controller driver handles two versions of the hardware,
11 * called NFCv2 and is available on Armada SoCs.
17 * The ECC layouts are depicted in details in Marvell AN-379, but here
26 * controller when Hamming is chosen:
28 * +-------------------------------------------------------------+
30 * +-------------------------------------------------------------+
36 * 30B per ECC chunk. Here is the page layout used by the controller
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/openbmc/u-boot/arch/arm/mach-mvebu/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
32 * on Armada to configure CP15 in start.S / cpu_init_cp15() in lowlevel_init()
41 writel(readl(&reg->rstoutn_mask) | 1, &reg->rstoutn_mask); in reset_cpu()
42 writel(readl(&reg->sys_soft_rst) | 1, &reg->sys_soft_rst); in reset_cpu()
77 /* SAR frequency values for Armada 375 */
87 { 8, 0x0, 500, 250, 334 },
112 /* SAR frequency values for Armada 38x */
125 /* SAR frequency values for Armada XP */
148 val = readl(CONFIG_SAR2_REG); /* SAR - Sample At Reset */ in get_sar_freq()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt3 The Device Bus controller available in some Marvell's SoC allows to control
4 different types of standard memory and I/O devices such as NOR, NAND, and FPGA.
9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
17 the controller's register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Ddove.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
11 model = "Marvell Armada 88AP510 SoC";
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
[all …]
/openbmc/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
54 K: *Content regex* (perl extended) pattern match in a patch or file.
56 K: of_get_profile
58 K: \b(printk|pr_(info|err))\b
61 One regex pattern per line. Multiple K: lines acceptable.
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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/openbmc/
Dopengrok2.0.log1 2025-03-24 03:00:46.525-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-03-24 03:00:46.643-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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Dopengrok1.0.log1 2025-03-25 03:00:34.996-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-03-25 03:00:35.114-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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