Searched +full:armada +full:- +full:3700 +full:- +full:uart +full:- +full:clock (Results 1 – 15 of 15) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/serial/ |
H A D | mvebu-uart.txt | 1 * Marvell UART : Non standard UART used in some of Marvell EBU SoCs 2 e.g., Armada-3700. 5 - compatible: 6 - "marvell,armada-3700-uart" for the standard variant of the UART 7 (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the 9 - "marvell,armada-3700-uart-ext" for the extended variant of the 10 UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit 12 - reg: offset and length of the register set for the device. 13 - clocks: UART reference clock used to derive the baudrate. If no clock 14 is provided (possible only with the "marvell,armada-3700-uart" [all …]
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/openbmc/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-37xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Marvell Armada 37xx family of SoCs. 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 model = "Marvell Armada 37xx SoC"; 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 25 reserved-memory { 26 #address-cells = <2>; [all …]
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H A D | ac5-98dx25xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 #address-cells = <2>; 21 #size-cells = <0>; 23 cpu-map { 36 compatible = "arm,cortex-a55"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | marvell,armada-3700-uart-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/marvell,armada-3700-uart-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 title: Marvell Armada 3720 UART clocks 9 - Pali Rohár <pali@kernel.org> 13 const: marvell,armada-3700-uart-clock 17 - description: UART Clock Control Register 18 - description: UART 2 Baud Rate Divisor Register 22 List of parent clocks suitable for UART from following set: [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | armada-37xx.dtsi | 2 * Device Tree Include file for Marvell Armada 37xx family of SoCs. 6 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * This file is dual-licensed: you can use it either under the terms 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 48 #include <dt-bindings/comphy/comphy_data.h> 49 #include <dt-bindings/gpio/gpio.h> 52 model = "Marvell Armada 37xx SoC"; 54 interrupt-parent = <&gic>; 55 #address-cells = <2>; 56 #size-cells = <2>; [all …]
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/openbmc/u-boot/arch/arm/mach-mvebu/ |
H A D | Kconfig | 41 # Armada 7K and 8K are very similar - use only one Kconfig symbol for both 46 # Armada PLL frequency (used for NAND clock generation) 52 # Armada XP/38x SoC types... 71 prompt "Armada XP/375/38x/3700/7K/8K board select" 83 bool "Support Armada 37xx platforms" 88 bool "Support DB-88F6720 Armada 375" 92 bool "Support DB-88F6820-GP" 96 bool "Support DB-88F6820-AMC" 108 bool "Support Armada 7k/8k platforms" 114 bool "Support db-mv784mp-gp" [all …]
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/openbmc/u-boot/drivers/serial/ |
H A D | Kconfig | 11 Select a default baudrate, where "default" has a driver-specific 12 meaning of either setting the baudrate for the early debug UART 19 # non-dm serial code 32 In various cases, we need to specify which of the UART devices that 34 in U-Boot. 41 In very space-constrained devices even the full UART driver is too 42 large. In this case the debug UART can still be used in some cases. 43 This option enables the full UART in U-Boot, so if is it disabled, 44 the full UART driver will be omitted, thus saving space. 51 In very space-constrained devices even the full UART driver is too [all …]
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H A D | serial_mvebu_a3700.c | 1 // SPDX-License-Identifier: GPL-2.0+ 36 void __iomem *base = plat->base; in mvebu_serial_putc() 49 void __iomem *base = plat->base; in mvebu_serial_getc() 60 void __iomem *base = plat->base; in mvebu_serial_pending() 71 void __iomem *base = plat->base; in mvebu_serial_setbrg() 75 * baudrate = clock / 16 / divider in mvebu_serial_setbrg() 81 * UART defaults to 16x scheme in mvebu_serial_setbrg() 91 void __iomem *base = plat->base; in mvebu_serial_probe() 107 plat->base = devfdt_get_addr_ptr(dev); in mvebu_serial_ofdata_to_platdata() 120 { .compatible = "marvell,armada-3700-uart" }, [all …]
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/openbmc/linux/drivers/tty/serial/ |
H A D | mvebu-uart.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Marvell Armada-3700 Serial Driver 11 #include <linux/clk-provider.h> 74 * Marvell Armada 3700 Functional Specifications describes that bit 21 of UART 75 * Clock Control register controls UART1 and bit 20 controls UART2. But in 106 #define MVEBU_UART_TYPE "mvebu-uart" 134 /* Driver data, a structure for each UART port */ 152 /* MVEBU UART driver structure */ 165 return (struct mvebu_uart *)port->private_data; in to_mvuart() 168 #define IS_EXTENDED(port) (to_mvuart(port)->data->is_ext) [all …]
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/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-385-synology-ds116.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include "armada-385.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 14 compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380"; 17 stdout-path = "serial0:115200n8"; 32 internal-regs { 34 pinctrl-names = "default"; 35 pinctrl-0 = <&i2c0_pins>; 37 clock-frequency = <100000>; [all …]
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/openbmc/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |
/openbmc/linux/Documentation/admin-guide/ |
H A D | kernel-parameters.txt | 5 force -- enable ACPI if default was off 6 on -- enable ACPI but allow fallback to DT [arm64,riscv64] 7 off -- disable ACPI if default was on 8 noirq -- do not use ACPI for IRQ routing 9 strict -- Be less tolerant of platforms that are not 11 rsdt -- prefer RSDT over (default) XSDT 12 copy_dsdt -- copy DSDT to memory 26 If set to vendor, prefer vendor-specific driver 58 Documentation/firmware-guide/acpi/debug.rst for more information about 116 Format: <byte> or <bitmap-list> [all …]
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