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/openbmc/linux/arch/riscv/lib/
H A Duaccess.S43 * Copy first bytes until dst is aligned to word boundary.
45 * t1 - start of aligned dst
49 /* dst is already aligned, skip */
57 bltu a0, t1, 1b /* t1 - start of aligned dst */
61 * Now dst is aligned.
63 * Use word-copy if both src and dst are aligned because
72 * Both src and dst are aligned, unrolled word copy
74 * a0 - start of aligned dst
75 * a1 - start of aligned src
76 * t0 - end of aligned dst
[all …]
/openbmc/linux/tools/testing/selftests/mm/
H A Dmremap_test.c41 _1KB = 1ULL << 10, /* 1KB -> not page aligned */
253 * Check that the address is aligned to the specified alignment. in get_source_mapping()
256 * 2MB-aligned, however it will not be considered valid for a in get_source_mapping()
469 "mremap - Destination Address Misaligned (1KB-aligned)"); in main()
472 "mremap - Source Address Misaligned (1KB-aligned)"); in main()
474 /* Src addr PTE aligned */ in main()
477 "8KB mremap - Source PTE-aligned, Destination PTE-aligned"); in main()
479 /* Src addr 1MB aligned */ in main()
481 "2MB mremap - Source 1MB-aligned, Destination PTE-aligned"); in main()
483 "2MB mremap - Source 1MB-aligned, Destination 1MB-aligned"); in main()
[all …]
/openbmc/qemu/include/user/
H A Dabitypes.h44 typedef int16_t abi_short __attribute__ ((aligned(ABI_SHORT_ALIGNMENT)));
45 typedef uint16_t abi_ushort __attribute__((aligned(ABI_SHORT_ALIGNMENT)));
46 typedef int32_t abi_int __attribute__((aligned(ABI_INT_ALIGNMENT)));
47 typedef uint32_t abi_uint __attribute__((aligned(ABI_INT_ALIGNMENT)));
48 typedef int64_t abi_llong __attribute__((aligned(ABI_LLONG_ALIGNMENT)));
49 typedef uint64_t abi_ullong __attribute__((aligned(ABI_LLONG_ALIGNMENT)));
52 typedef uint32_t abi_ulong __attribute__((aligned(ABI_LONG_ALIGNMENT)));
53 typedef int32_t abi_long __attribute__((aligned(ABI_LONG_ALIGNMENT)));
64 typedef target_ulong abi_ulong __attribute__((aligned(ABI_LONG_ALIGNMENT)));
65 typedef target_long abi_long __attribute__((aligned(ABI_LONG_ALIGNMENT)));
/openbmc/linux/drivers/scsi/
H A Dipr.h333 }__attribute__((packed, aligned (4)));
411 }__attribute__ ((packed, aligned (4)));
434 }__attribute__ ((packed, aligned (8)));
441 }__attribute__((packed, aligned (4)));
448 }__attribute__((packed, aligned (4)));
453 }__attribute__((packed, aligned (4)));
458 }__attribute__((packed, aligned (8)));
473 }__attribute__((packed, aligned (4)));
481 }__attribute__((packed, aligned (4)));
543 }__attribute__ ((packed, aligned(4)));
[all …]
/openbmc/linux/arch/xtensa/include/asm/
H A Dcoprocessor.h118 #define __REG2_1(n,s,a) unsigned char n[s] __attribute__ ((aligned(a)));
119 #define __REG2_2(n,s,a) unsigned char n[s] __attribute__ ((aligned(a)));
122 __attribute__ ((aligned (XCHAL_NCP_SA_ALIGN)));
124 __attribute__ ((aligned (XCHAL_NCP_SA_ALIGN)));
129 __attribute__ ((aligned (XCHAL_CP0_SA_ALIGN)));
131 __attribute__ ((aligned (XCHAL_CP1_SA_ALIGN)));
133 __attribute__ ((aligned (XCHAL_CP2_SA_ALIGN)));
135 __attribute__ ((aligned (XCHAL_CP3_SA_ALIGN)));
137 __attribute__ ((aligned (XCHAL_CP4_SA_ALIGN)));
139 __attribute__ ((aligned (XCHAL_CP5_SA_ALIGN)));
[all …]
/openbmc/linux/arch/xtensa/lib/
H A Dmemset.S23 * If the destination is aligned,
27 * setting 1B and 2B and then go to aligned case.
29 * case of an aligned destination (except for the branches to
47 .L0: # return here from .Ldstunaligned when dst is aligned
54 * Destination is word-aligned.
56 # set 16 bytes per iteration for word-aligned dst
106 bbci.l a5, 0, .L20 # branch if dst alignment half-aligned
107 # dst is only byte aligned
112 # now retest if dst aligned
113 bbci.l a5, 1, .L0 # if now aligned, return to main algorithm
[all …]
H A Dmemcopy.S34 * If source is aligned,
40 * case of aligned source and destination and multiple
89 .Ldst1mod2: # dst is only byte aligned
98 _bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then
100 .Ldst2mod4: # dst 16-bit aligned
110 j .Ldstaligned # dst is now aligned, return to main algorithm
121 .Ldstaligned: # return here from .Ldst?mod? once dst is aligned
124 movi a8, 3 # if source is not aligned,
127 * Destination and source are word-aligned, use word copy.
129 # copy 16 bytes per iteration for word-aligned dst and word-aligned src
[all …]
H A Dusercopy.S30 * If the destination and source are both aligned,
33 * If destination is aligned and source unaligned,
38 * case of aligned destinations (except for the branches to
75 .Ldstaligned: # return here from .Ldstunaligned when dst is aligned
78 movi a8, 3 # if source is also aligned,
89 .Ldst1mod2: # dst is only byte aligned
98 bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then
100 .Ldst2mod4: # dst 16-bit aligned
110 j .Ldstaligned # dst is now aligned, return to main algorithm
138 * Destination and source are word-aligned.
[all …]
H A Dchecksum.S44 * is aligned on either a 2-byte or 4-byte boundary.
48 bnez a5, 8f /* branch if 2-byte aligned */
112 /* uncommon case, buf is 2-byte aligned */
118 bnez a5, 8f /* branch if 1-byte aligned */
124 j 1b /* now buf is 4-byte aligned */
126 /* case: odd-byte aligned, len > 1
188 This function is optimized for 4-byte aligned addresses. Other
199 aligned case. Two bbsi.l instructions might seem more optimal
206 beqz a9, 1f /* branch if both are 4-byte aligned */
208 j 3f /* one address is 2-byte aligned */
[all …]
/openbmc/linux/drivers/scsi/pm8001/
H A Dpm8001_hwi.h146 } __attribute__((packed, aligned(4)));
158 } __attribute__((packed, aligned(4)));
169 } __attribute__((packed, aligned(4)));
221 } __attribute__((packed, aligned(4)));
234 } __attribute__((packed, aligned(4)));
250 } __attribute__((packed, aligned(4)));
263 } __attribute__((packed, aligned(4)));
276 } __attribute__((packed, aligned(4)));
287 } __attribute__((packed, aligned(4)));
299 } __attribute__((packed, aligned(4)));
[all …]
H A Dpm80xx_hwi.h345 } __attribute__((packed, aligned(4)));
357 } __attribute__((packed, aligned(4)));
367 } __attribute__((packed, aligned(4)));
418 } __attribute__((packed, aligned(4)));
432 } __attribute__((packed, aligned(4)));
441 } __attribute__((packed, aligned(4)));
456 } __attribute__((packed, aligned(4)));
468 } __attribute__((packed, aligned(4)));
479 } __attribute__((packed, aligned(4)));
489 } __attribute__((packed, aligned(4)));
[all …]
/openbmc/u-boot/include/
H A Dmemalign.h27 * 1) The beginning of the array can be advanced enough to be aligned.
29 * 2) The size of the aligned portion of the array is a multiple of the minimum
32 * 3) The aligned portion contains enough space for the original number of
35 * The macro then creates a pointer to the aligned portion of this array and
36 * assigns to the pointer the address of the first element in the aligned
49 * 1) The resulting buffer is guaranteed to be aligned to the value of
67 * line aligned global buffer.
85 * purpose is to allow allocating aligned buffers outside of function scope.
97 * malloc_cache_aligned() - allocate a memory region aligned to cache line size
H A Dbouncebuf.h17 * requiring the aligned transfer happens, then the bounce buffer is lost upon
24 * operation requiring the aligned transfer happens, then the bounce buffer is
33 * requiring the aligned transfer happens, then the bounce buffer is copied
43 * DMA-aligned buffer. This field is always set to the value that
45 * freshly allocated aligned buffer.
50 /* DMA-aligned buffer length */
59 * data: pointer to buffer to be aligned
/openbmc/linux/include/uapi/linux/
H A Drseq.h41 * struct rseq_cs is aligned on 4 * 8 bytes to ensure it is always
54 } __attribute__((aligned(4 * sizeof(__u64))));
57 * struct rseq is aligned on 4 * 8 bytes to ensure it is always
67 * registered this data structure. Aligned on 32-bit. Always
80 * data structure. Aligned on 32-bit. Values
107 * thread which registered this data structure. Aligned on 64-bit.
138 * Aligned on 32-bit. Contains the current NUMA node ID.
146 * Aligned on 32-bit. Contains the current thread's concurrency ID
155 } __attribute__((aligned(4 * sizeof(__u64))));
H A Dtypes.h17 typedef __signed__ __int128 __s128 __attribute__((aligned(16)));
18 typedef unsigned __int128 __u128 __attribute__((aligned(16)));
55 #define __aligned_u64 __u64 __attribute__((aligned(8)))
56 #define __aligned_be64 __be64 __attribute__((aligned(8)))
57 #define __aligned_le64 __le64 __attribute__((aligned(8)))
/openbmc/linux/tools/testing/selftests/rseq/
H A Drseq-abi.h41 * struct rseq_abi_cs is aligned on 4 * 8 bytes to ensure it is always
54 } __attribute__((aligned(4 * sizeof(__u64))));
57 * struct rseq_abi is aligned on 4 * 8 bytes to ensure it is always
67 * registered this data structure. Aligned on 32-bit. Always
80 * data structure. Aligned on 32-bit. Values
107 * thread which registered this data structure. Aligned on 64-bit.
154 * Aligned on 32-bit. Contains the current NUMA node ID.
162 * Aligned on 32-bit. Contains the current thread's concurrency ID
171 } __attribute__((aligned(4 * sizeof(__u64))));
/openbmc/linux/drivers/staging/media/atomisp/pci/
H A Dia_css_env.h54 The address must be an 8 bit aligned address. */
57 The address must be a 16 bit aligned address. */
60 The address must be a 32 bit aligned address. */
63 space. The address must be an 8 bit aligned address. */
66 space. The address must be a 16 bit aligned address. */
69 space. The address must be a 32 bit aligned address. */
71 /** Store a number of bytes into a byte-aligned address in the CSS HW address space. */
73 /** Load a number of bytes from a byte-aligned address in the CSS HW address space. */
/openbmc/linux/arch/mips/kernel/
H A Dcmpxchg.c16 /* Check that ptr is naturally aligned */ in __xchg_small()
25 * exchange within the naturally aligned 4 byte integer that includes in __xchg_small()
35 * Calculate a pointer to the naturally aligned 4 byte integer that in __xchg_small()
57 /* Check that ptr is naturally aligned */ in __cmpxchg_small()
67 * compare & exchange within the naturally aligned 4 byte integer in __cmpxchg_small()
77 * Calculate a pointer to the naturally aligned 4 byte integer that in __cmpxchg_small()
93 * Calculate the old & new values of the naturally aligned in __cmpxchg_small()
/openbmc/u-boot/doc/
H A DREADME.displaying-bmps6 make sure all data is properly aligned, and in many situations simply choosing
7 a 32 bit aligned address is enough to ensure proper alignment. This is not
23 When placed in an aligned address such as 0x80a00000, char signature offsets
26 access is generated at a non-32-bit-aligned address, causing a data abort.
27 The proper alignment for BMP images is therefore: 32-bit-aligned-address + 2.
/openbmc/linux/lib/
H A Diomap_copy.c11 * @to: destination, in MMIO space (must be 32-bit aligned)
12 * @from: source (must be 32-bit aligned)
34 * @to: destination (must be 32-bit aligned)
35 * @from: source, in MMIO space (must be 32-bit aligned)
55 * @to: destination, in MMIO space (must be 64-bit aligned)
56 * @from: source (must be 64-bit aligned)
/openbmc/linux/arch/sparc/kernel/
H A Dsstate.c38 static const char booting_msg[32] __attribute__((aligned(32))) =
40 static const char running_msg[32] __attribute__((aligned(32))) =
42 static const char halting_msg[32] __attribute__((aligned(32))) =
44 static const char poweroff_msg[32] __attribute__((aligned(32))) =
46 static const char rebooting_msg[32] __attribute__((aligned(32))) =
48 static const char panicking_msg[32] __attribute__((aligned(32))) =
/openbmc/linux/arch/arm64/lib/
H A Dmemset.S54 /*All store maybe are non-aligned..*/
70 /*Whether the start address is aligned with 16.*/
76 * then adjust the dst aligned with 16.This process will make the current
79 stp A_l, A_l, [dst] /*non-aligned store..*/
80 /*make the dst aligned..*/
103 * It will lead some bytes written twice and the access is non-aligned.
162 * Compute how far we need to go to become suitably aligned. We're
170 b.eq 2f /* Already aligned. */
171 /* Not aligned, check that there's enough to copy after alignment.*/
/openbmc/linux/arch/parisc/lib/
H A Dio.c162 * SRC. SRC must be at least short aligned. This is used by the
179 case 0x00: /* Buffer 32-bit aligned */ in insw()
193 case 0x02: /* Buffer 16-bit aligned */ in insw()
210 case 0x01: /* Buffer 8-bit aligned */ in insw()
251 case 0x00: /* Buffer 32-bit aligned */ in insl()
259 case 0x02: /* Buffer 16-bit aligned */ in insl()
275 case 0x01: /* Buffer 8-bit aligned */ in insl()
292 case 0x03: /* Buffer 8-bit aligned */ in insl()
315 * Don't worry as much about doing aligned memory transfers:
349 case 0x00: /* Buffer 32-bit aligned */ in outsw()
[all …]
/openbmc/phosphor-networkd/test/
H A Dtest_rtnetlink.cpp25 ifinfomsg hdr __attribute__((aligned(NLMSG_ALIGNTO))); in TEST()
38 ifinfomsg hdr __attribute__((aligned(NLMSG_ALIGNTO))); in TEST()
39 rtattr addr_hdr __attribute__((aligned((RTA_ALIGNTO)))); in TEST()
41 __attribute__((aligned((RTA_ALIGNTO)))) = {0, 1, 2, 3, 4, 5}; in TEST()
42 rtattr name_hdr __attribute__((aligned((RTA_ALIGNTO)))); in TEST()
43 char name[5] __attribute__((aligned((RTA_ALIGNTO)))) = "eth0"; in TEST()
44 rtattr mtu_hdr __attribute__((aligned((RTA_ALIGNTO)))); in TEST()
45 unsigned mtu __attribute__((aligned((RTA_ALIGNTO)))) = 50; in TEST()
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-connectivity/libtorrent/
H A Dlibtorrent_0.14.0.bb20 PACKAGECONFIG ??= "instrumentation aligned"
27 PACKAGECONFIG[aligned] = "--enable-aligned,--disable-aligned,"

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