| /openbmc/qemu/target/i386/hvf/ |
| H A D | x86hvf.c | 80 if (hv_vcpu_write_fpstate(cs->accel->fd, xsave, xsave_len)) { in hvf_put_xsave()
90 wvmcs(cs->accel->fd, VMCS_GUEST_IDTR_LIMIT, env->idt.limit); in hvf_put_segments()
91 wvmcs(cs->accel->fd, VMCS_GUEST_IDTR_BASE, env->idt.base); in hvf_put_segments()
93 wvmcs(cs->accel->fd, VMCS_GUEST_GDTR_LIMIT, env->gdt.limit); in hvf_put_segments()
94 wvmcs(cs->accel->fd, VMCS_GUEST_GDTR_BASE, env->gdt.base); in hvf_put_segments()
96 /* wvmcs(cs->accel->fd, VMCS_GUEST_CR2, env->cr[2]); */ in hvf_put_segments()
97 wvmcs(cs->accel->fd, VMCS_GUEST_CR3, env->cr[3]); in hvf_put_segments()
99 wvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER, env->efer); in hvf_put_segments()
101 macvm_set_cr4(cs->accel->fd, env->cr[4]); in hvf_put_segments()
102 macvm_set_cr0(cs->accel->fd, env->cr[0]); in hvf_put_segments()
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| H A D | hvf.c | 77 #include "qemu/accel.h"
89 wreg(cpu->accel->fd, HV_X86_TPR, tpr); in vmx_update_tpr()
91 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, 0); in vmx_update_tpr()
93 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, (irr > tpr) ? tpr >> 4 : in vmx_update_tpr()
101 int tpr = rreg(cpu->accel->fd, HV_X86_TPR) >> 4; in update_apic_tpr()
219 hv_vcpu_interrupt(&cpu->accel->fd, 1); in hvf_kick_vcpu_thread()
287 wvmcs(cpu->accel->fd, VMCS_PIN_BASED_CTLS, in hvf_arch_init_vcpu()
292 wvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
307 wvmcs(cpu->accel->fd, VMCS_SEC_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
310 wvmcs(cpu->accel->fd, VMCS_ENTRY_CTLS, in hvf_arch_init_vcpu()
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| H A D | x86.c | 64 base = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_BASE); in x86_read_segment_descriptor()
65 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_LIMIT); in x86_read_segment_descriptor()
67 base = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_BASE); in x86_read_segment_descriptor()
68 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_LIMIT); in x86_read_segment_descriptor()
87 base = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_BASE); in x86_write_segment_descriptor()
88 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_LIMIT); in x86_write_segment_descriptor()
90 base = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_BASE); in x86_write_segment_descriptor()
91 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_LIMIT); in x86_write_segment_descriptor()
105 target_ulong base = rvmcs(cpu->accel->fd, VMCS_GUEST_IDTR_BASE); in x86_read_call_gate()
106 uint32_t limit = rvmcs(cpu->accel->fd, VMCS_GUEST_IDTR_LIMIT); in x86_read_call_gate()
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| H A D | x86_descr.c | 50 return (uint32_t)rvmcs(cpu->accel->fd, vmx_segment_fields[seg].limit); in vmx_read_segment_limit()
55 return (uint32_t)rvmcs(cpu->accel->fd, vmx_segment_fields[seg].ar_bytes); in vmx_read_segment_ar()
60 return rvmcs(cpu->accel->fd, vmx_segment_fields[seg].base); in vmx_read_segment_base()
66 sel.sel = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector); in vmx_read_segment_selector()
72 wvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector()
77 desc->sel = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector); in vmx_read_segment_descriptor()
78 desc->base = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].base); in vmx_read_segment_descriptor()
79 desc->limit = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].limit); in vmx_read_segment_descriptor()
80 desc->ar = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].ar_bytes); in vmx_read_segment_descriptor()
87 wvmcs(cpu->accel->fd, sf->base, desc->base); in vmx_write_segment_descriptor()
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| H A D | vmx.h | 182 wreg(cpu->accel->fd, HV_X86_RIP, rip); in macvm_set_rip()
186 val = rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY); in macvm_set_rip()
190 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, in macvm_set_rip()
202 uint32_t gi = (uint32_t) rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY); in vmx_clear_nmi_blocking()
204 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_clear_nmi_blocking()
213 uint32_t gi = (uint32_t)rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY); in vmx_set_nmi_blocking()
215 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_set_nmi_blocking()
221 val = rvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS); in vmx_set_nmi_window_exiting()
222 wvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting()
231 val = rvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS); in vmx_clear_nmi_window_exiting()
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| /openbmc/linux/drivers/staging/sm750fb/ |
| H A D | sm750_accel.c | 20 static inline void write_dpr(struct lynx_accel *accel, int offset, u32 regValue) in write_dpr() argument
22 writel(regValue, accel->dprBase + offset); in write_dpr()
25 static inline u32 read_dpr(struct lynx_accel *accel, int offset) in read_dpr() argument
27 return readl(accel->dprBase + offset); in read_dpr()
30 static inline void write_dpPort(struct lynx_accel *accel, u32 data) in write_dpPort() argument
32 writel(data, accel->dpPortBase); in write_dpPort()
35 void sm750_hw_de_init(struct lynx_accel *accel) in sm750_hw_de_init() argument
40 write_dpr(accel, DE_MASKS, 0xFFFFFFFF); in sm750_hw_de_init()
52 write_dpr(accel, DE_STRETCH_FORMAT, in sm750_hw_de_init()
53 (read_dpr(accel, DE_STRETCH_FORMAT) & ~clr) | reg); in sm750_hw_de_init()
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| /openbmc/linux/Documentation/devicetree/bindings/iio/ |
| H A D | st,st-sensors.yaml | 24 - st,h3lis331dl-accel
28 - st,lis2dh12-accel
30 - st,lis331dl-accel
31 - st,lis331dlh-accel
33 - st,lis3dh-accel
36 - st,lis3lv02dl-accel
37 - st,lng2dm-accel
38 - st,lsm303agr-accel
39 - st,lsm303c-accel
40 - st,lsm303dl-accel
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| /openbmc/qemu/tests/avocado/ |
| H A D | boot_linux.py | 28 :avocado: tags=accel:tcg
31 self.vm.add_args("-accel", "tcg")
37 :avocado: tags=accel:kvm
40 self.vm.add_args("-accel", "kvm")
46 :avocado: tags=accel:tcg
49 self.vm.add_args("-accel", "tcg")
55 :avocado: tags=accel:kvm
58 self.vm.add_args("-accel", "kvm")
74 :avocado: tags=accel:kvm
78 self.vm.add_args("-accel", "kvm")
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| /openbmc/linux/drivers/iio/accel/ |
| H A D | st_accel_i2c.c | 27 .compatible = "st,lis3lv02dl-accel",
31 .compatible = "st,lsm303dlh-accel",
35 .compatible = "st,lsm303dlhc-accel",
39 .compatible = "st,lis3dh-accel",
43 .compatible = "st,lsm330d-accel",
47 .compatible = "st,lsm330dl-accel",
51 .compatible = "st,lsm330dlc-accel",
55 .compatible = "st,lis331dl-accel",
59 .compatible = "st,lis331dlh-accel",
63 .compatible = "st,lsm303dl-accel",
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| H A D | st_accel_spi.c | 22 * For old single-chip devices keep <device_name>-accel to maintain
32 .compatible = "st,lis3lv02dl-accel",
36 .compatible = "st,lis3dh-accel",
40 .compatible = "st,lsm330d-accel",
44 .compatible = "st,lsm330dl-accel",
48 .compatible = "st,lsm330dlc-accel",
52 .compatible = "st,lis331dlh-accel",
56 .compatible = "st,lsm330-accel",
60 .compatible = "st,lsm303agr-accel",
64 .compatible = "st,lis2dh12-accel",
[all …]
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| H A D | bmi088-accel-spi.c | 14 #include "bmi088-accel.h"
65 { .compatible = "bosch,bmi085-accel" },
66 { .compatible = "bosch,bmi088-accel" },
67 { .compatible = "bosch,bmi090l-accel" },
73 {"bmi085-accel", BOSCH_BMI085},
74 {"bmi088-accel", BOSCH_BMI088},
75 {"bmi090l-accel", BOSCH_BMI090L},
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| /openbmc/linux/drivers/platform/x86/ |
| H A D | classmate-laptop.c | 207 struct cmpc_accel *accel; in cmpc_accel_sensitivity_show_v4() local
211 accel = dev_get_drvdata(&inputdev->dev); in cmpc_accel_sensitivity_show_v4()
213 return sprintf(buf, "%d\n", accel->sensitivity); in cmpc_accel_sensitivity_show_v4()
222 struct cmpc_accel *accel; in cmpc_accel_sensitivity_store_v4() local
228 accel = dev_get_drvdata(&inputdev->dev); in cmpc_accel_sensitivity_store_v4()
238 accel->sensitivity = sensitivity; in cmpc_accel_sensitivity_store_v4()
256 struct cmpc_accel *accel; in cmpc_accel_g_select_show_v4() local
260 accel = dev_get_drvdata(&inputdev->dev); in cmpc_accel_g_select_show_v4()
262 return sprintf(buf, "%d\n", accel->g_select); in cmpc_accel_g_select_show_v4()
271 struct cmpc_accel *accel; in cmpc_accel_g_select_store_v4() local
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| /openbmc/qemu/accel/ |
| H A D | accel-system.c | 2 * QEMU accel class, system emulation components
27 #include "qemu/accel.h"
29 #include "system/accel-ops.h"
32 #include "accel-system.h"
34 int accel_init_machine(AccelState *accel, MachineState *ms) in accel_init_machine() argument
36 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_init_machine()
38 ms->accelerator = accel; in accel_init_machine()
44 object_unref(OBJECT(accel)); in accel_init_machine()
58 AccelState *accel = ms->accelerator; in accel_setup_post() local
59 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_setup_post()
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| H A D | accel-target.c | 2 * QEMU accel class, components common to system emulation and user mode
27 #include "qemu/accel.h"
30 #include "accel/accel-cpu-target.h"
33 #include "accel-system.h"
67 * The first callback allows accel-cpu to run initializations in accel_init_cpu_int_aux()
70 * The second one allows the CPU to customize the accel-cpu in accel_init_cpu_int_aux()
85 /* initialize the arch-specific accel CpuClass interfaces */
123 AccelState *accel = current_accel(); in accel_cpu_common_realize() local
124 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_cpu_common_realize()
143 AccelState *accel = current_accel(); in accel_cpu_common_unrealize() local
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| H A D | accel-user.c | 2 * QEMU accel class, user-mode components
11 #include "qemu/accel.h"
15 static AccelState *accel; in current_accel() local
17 if (!accel) { in current_accel()
21 accel = ACCEL(object_new_with_class(OBJECT_CLASS(ac))); in current_accel()
23 return accel; in current_accel()
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| /openbmc/linux/drivers/iio/imu/inv_icm42600/ |
| H A D | inv_icm42600_buffer.c | 37 struct inv_icm42600_fifo_sensor_data accel; member
44 ssize_t inv_icm42600_fifo_decode_packet(const void *packet, const void **accel, in inv_icm42600_fifo_decode_packet() argument
54 *accel = NULL; in inv_icm42600_fifo_decode_packet()
69 /* accel + gyro */ in inv_icm42600_fifo_decode_packet()
72 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
79 /* accel only */ in inv_icm42600_fifo_decode_packet()
81 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
90 *accel = NULL; in inv_icm42600_fifo_decode_packet()
111 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr); in inv_icm42600_buffer_update_fifo_period()
188 * set for gyro and accel sensors. Since watermark is all about acceptable data
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| H A D | inv_icm42600_core.c | 72 .accel = {
156 enum inv_icm42600_sensor_mode accel, in inv_icm42600_set_pwr_mgmt0() argument
160 enum inv_icm42600_sensor_mode oldaccel = st->conf.accel.mode; in inv_icm42600_set_pwr_mgmt0()
167 if (gyro == oldgyro && accel == oldaccel && temp == oldtemp) in inv_icm42600_set_pwr_mgmt0()
171 INV_ICM42600_PWR_MGMT0_ACCEL(accel); in inv_icm42600_set_pwr_mgmt0()
179 st->conf.accel.mode = accel; in inv_icm42600_set_pwr_mgmt0()
189 /* accel startup time */ in inv_icm42600_set_pwr_mgmt0()
190 if (accel != oldaccel && oldaccel == INV_ICM42600_SENSOR_MODE_OFF) { in inv_icm42600_set_pwr_mgmt0()
223 struct inv_icm42600_sensor_conf *oldconf = &st->conf.accel; in inv_icm42600_set_accel_conf()
237 /* set ACCEL_CONFIG0 register (accel fullscale & odr) */ in inv_icm42600_set_accel_conf()
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| /openbmc/qemu/host/include/generic/host/crypto/ |
| H A D | aes-round.h | 13 QEMU_ERROR("unsupported accel");
16 QEMU_ERROR("unsupported accel");
19 QEMU_ERROR("unsupported accel");
22 QEMU_ERROR("unsupported accel");
25 QEMU_ERROR("unsupported accel");
28 QEMU_ERROR("unsupported accel");
31 QEMU_ERROR("unsupported accel");
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| /openbmc/linux/drivers/accel/ |
| H A D | drm_accel.c | 31 return kasprintf(GFP_KERNEL, "accel/%s", dev_name(dev)); in accel_devnode()
36 accel_class = class_create("accel"); in accel_sysfs_init()
81 * accel_debugfs_init() - Initialize debugfs for accel minor
107 * accel_set_device_instance_params() - Set some device parameters for accel device
111 * This function creates the dev_t of the device using the accel major and
113 * device instance to the accel sysfs class and device type, respectively.
123 * accel_open - open method for ACCEL file
128 * It looks up the correct ACCEL device and instantiates all the per-file
199 unregister_chrdev(ACCEL_MAJOR, "accel"); in accel_core_exit()
211 DRM_ERROR("Cannot create ACCEL class: %d\n", ret); in accel_core_init()
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| /openbmc/linux/Documentation/accel/ |
| H A D | introduction.rst | 13 Machine-Learning (ML) and/or Deep-Learning (DL) computations, the accel layer
47 characteristics as those of GPUs, the accel subsystem will use the
48 DRM subsystem's code and functionality. i.e. the accel core code will
49 be part of the DRM subsystem and an accel device will be a new type of DRM
65 tree - drivers/accel/.
70 - device char files - /dev/accel/accel\*
71 - sysfs - /sys/class/accel/accel\*/
72 - debugfs - /sys/kernel/debug/accel/\*/
81 accel subsystem.
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| /openbmc/qemu/docs/devel/migration/ |
| H A D | qpl-compression.rst | 22 | MultiFD Thread | |accel-config tool |
85 The ``accel-config`` tool is used to enable ``IAA`` devices and configure
90 For ``accel-config`` installation, please refer to `accel-config installation
97 #accel-config config-engine iax1/engine1.0 -g 0
98 #accel-config config-engine iax1/engine1.1 -g 0
99 #accel-config config-engine iax1/engine1.2 -g 0
100 #accel-config config-engine iax1/engine1.3 -g 0
101 #accel-config config-engine iax1/engine1.4 -g 0
102 #accel-config config-engine iax1/engine1.5 -g 0
103 #accel-config config-engine iax1/engine1.6 -g 0
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| /openbmc/linux/Documentation/devicetree/bindings/iio/accel/ |
| H A D | bosch,bmi088.yaml | 4 $id: http://devicetree.org/schemas/iio/accel/bosch,bmi088.yaml#
20 - bosch,bmi085-accel
21 - bosch,bmi088-accel
22 - bosch,bmi090l-accel
62 bmi088-accel@1 {
63 compatible = "bosch,bmi088-accel";
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| /openbmc/linux/drivers/crypto/intel/qat/qat_c3xxx/ |
| H A D | adf_c3xxx_hw_data.c | 30 u32 accel; in get_accel_mask() local
32 accel = ~(fuses | straps) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET; in get_accel_mask()
33 accel &= ADF_C3XXX_ACCELERATORS_MASK; in get_accel_mask()
35 return accel; in get_accel_mask()
44 int accel; in get_ae_mask() local
46 /* If an accel is disabled, then disable the corresponding two AEs */ in get_ae_mask()
49 for_each_set_bit(accel, &disabled, ADF_C3XXX_MAX_ACCELERATORS) in get_ae_mask()
50 straps |= ae_disable << (accel << 1); in get_ae_mask()
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| /openbmc/linux/drivers/crypto/intel/qat/qat_c62x/ |
| H A D | adf_c62x_hw_data.c | 30 u32 accel; in get_accel_mask() local
32 accel = ~(fuses | straps) >> ADF_C62X_ACCELERATORS_REG_OFFSET; in get_accel_mask()
33 accel &= ADF_C62X_ACCELERATORS_MASK; in get_accel_mask()
35 return accel; in get_accel_mask()
44 int accel; in get_ae_mask() local
46 /* If an accel is disabled, then disable the corresponding two AEs */ in get_ae_mask()
49 for_each_set_bit(accel, &disabled, ADF_C62X_MAX_ACCELERATORS) in get_ae_mask()
50 straps |= ae_disable << (accel << 1); in get_ae_mask()
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| /openbmc/qemu/tests/qemu-iotests/tests/ |
| H A D | stream-under-throttle | 36 Variant of iotests.VM that uses -accel tcg. Simply using
37 iotests.VM.add_args('-accel', 'tcg') is not sufficient, because that will
38 put -accel qtest before -accel tcg, and -accel arguments are prioritized in
43 # Put -accel tcg first so it takes precedence
44 return ['-accel', 'tcg'] + super()._base_args
83 # create an -accel tcg VM
|