| /openbmc/u-boot/doc/device-tree-bindings/pinctrl/ |
| H A D | marvell,armada-cp110-pinctrl.txt | 78 4 MSS_UART_RXD UART1_CTS PCIe0_CLKREQ
116 42 MSS_UART_TXD SPI0_MISO UART1_CTS
126 52 SPI1_CSn[2] - UART1_CTS
132 58 AU_I2SDI SPI0_MISO UART1_CTS
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| /openbmc/linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap3-zoom3.dts | 87 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
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| H A D | omap3-overo-alto35-common.dtsi | 57 OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
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| H A D | omap3-lilly-a83x.dtsi | 83 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
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| H A D | omap4-var-om44customboard.dtsi | 65 OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi1_cs2.uart1_cts */
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| H A D | omap3-evm-processor-common.dtsi | 140 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_cts.gpio_150 */
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| H A D | omap5-board-common.dtsi | 263 OMAP5_IOPAD(0x0a0, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
264 OMAP5_IOPAD(0x0a2, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
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| /openbmc/u-boot/board/overo/ |
| H A D | overo.h | 91 MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\
156 MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150-YELLOW LED*/\
163 MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150-YELLOW LED*/\
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| /openbmc/linux/drivers/pinctrl/vt8500/ |
| H A D | pinctrl-wm8650.c | 203 PINCTRL_PIN(WMT_PIN_UART1CTS, "uart1_cts"),
298 "uart1_cts",
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| H A D | pinctrl-wm8750.c | 219 PINCTRL_PIN(WMT_PIN_UART1_CTS, "uart1_cts"),
326 "uart1_cts",
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| H A D | pinctrl-wm8850.c | 216 PINCTRL_PIN(WMT_PIN_UART1_CTS, "uart1_cts"),
316 "uart1_cts",
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| H A D | pinctrl-vt8500.c | 187 PINCTRL_PIN(WMT_PIN_UART1CTS, "uart1_cts"),
326 "uart1_cts",
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| H A D | pinctrl-wm8505.c | 313 PINCTRL_PIN(WMT_PIN_UART1_CTS, "uart1_cts"),
461 "uart1_cts",
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| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp15xx-dhcom-drc02.dtsi | 140 * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
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| /openbmc/linux/arch/arm/boot/dts/hisilicon/ |
| H A D | hi3620-hi4511.dts | 89 0x0f8 0x0 /* UART1_CTS & UART1_RTS (IOMG61) */
377 0x210 0 /* UART1_CTS (IOCFG140) */
387 0x210 0 /* UART1_CTS (IOCFG140) */
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | omap3-evm-processor-common.dtsi | 132 OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
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| /openbmc/u-boot/arch/arm/include/asm/arch-omap5/ |
| H A D | mux_omap5.h | 114 #define UART1_CTS 0x00a2 macro
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| /openbmc/u-boot/board/logicpd/omap3som/ |
| H A D | omap3logic.h | 143 MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); /*UART1_CTS*/ in set_muxconf_regs()
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| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | mediatek,mt7622-pinctrl.yaml | 290 UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD,
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| H A D | mediatek,mt7986-pinctrl.yaml | 280 UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, UART1_CTS,
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| /openbmc/linux/drivers/pinctrl/intel/ |
| H A D | pinctrl-denverton.c | 133 PINCTRL_PIN(95, "UART1_CTS"),
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| /openbmc/linux/drivers/pinctrl/bcm/ |
| H A D | pinctrl-ns.c | 52 { 14, "uart1_cts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
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| /openbmc/linux/arch/arm64/boot/dts/rockchip/ |
| H A D | px30-evb.dts | 613 pinctrl-0 = <&uart1_xfer &uart1_cts>;
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| H A D | rk3326-odroid-go.dtsi | 542 pinctrl-0 = <&uart1_xfer &uart1_cts>;
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| /openbmc/u-boot/board/BuR/brppt1/ |
| H A D | mux.c | 32 /* UART1_CTS as I2C2-SDA */
|