| /openbmc/linux/arch/loongarch/mm/ |
| H A D | tlbex.S | 48 csrwr t1, EXCEPTION_KS1
56 csrrd t1, LOONGARCH_CSR_PGDL
61 alsl.d t1, ra, t1, 3
63 ld.d t1, t1, 0
65 alsl.d t1, ra, t1, 3
68 ld.d t1, t1, 0
70 alsl.d t1, ra, t1, 3
72 ld.d ra, t1, 0
84 alsl.d t1, t0, ra, _PTE_T_LOG2
88 ll.d t0, t1, 0
[all …]
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| /openbmc/u-boot/arch/mips/mach-ath79/ar933x/ |
| H A D | lowlevel_init.S | 82 lw t1, AR933X_RESET_REG_RESET_MODULE(t0)
83 ori t1, t1, 0x0800
84 sw t1, AR933X_RESET_REG_RESET_MODULE(t0)
86 lw t1, AR933X_RESET_REG_RESET_MODULE(t0)
88 and t1, t1, t2
89 sw t1, AR933X_RESET_REG_RESET_MODULE(t0)
101 andi t1, t5, 0x10
102 bnez t1, 2b
105 li t1, 0x02110E
106 sw t1, AR933X_RESET_REG_BOOTSTRAP(t0)
[all …]
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| /openbmc/linux/arch/loongarch/kernel/ |
| H A D | lbt.S | 26 movscr2gr t1, $scr0 # save scr
27 stptr.d t1, a0, THREAD_SCR0
28 movscr2gr t1, $scr1
29 stptr.d t1, a0, THREAD_SCR1
30 movscr2gr t1, $scr2
31 stptr.d t1, a0, THREAD_SCR2
32 movscr2gr t1, $scr3
33 stptr.d t1, a0, THREAD_SCR3
35 x86mfflag t1, 0x3f # save eflags
36 stptr.d t1, a0, THREAD_EFLAGS
[all …]
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| H A D | fpu.S | 307 fpu_save_csr a0 t1
308 fpu_save_double a0 t1 # clobbers t1
309 fpu_save_cc a0 t1 t2 # clobbers t1, t2
318 fpu_restore_double a0 t1 # clobbers t1
319 fpu_restore_csr a0 t1 t2
320 fpu_restore_cc a0 t1 t2 # clobbers t1, t2
330 lsx_save_all a0 t1 t2
339 lsx_restore_all a0 t1 t2
344 lsx_save_all_upper a0 t0 t1
349 lsx_restore_all_upper a0 t0 t1
[all …]
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| /openbmc/linux/arch/microblaze/lib/ |
| H A D | fastcopy.S | 75 andi r9, r6, 3 /* t1 = s & 3 */
80 lwi r9, r6, 0 /* t1 = *(s + 0) */
84 swi r9, r5, 0 /* *(d + 0) = t1 */
88 lwi r9, r6, 16 /* t1 = *(s + 16) */
92 swi r9, r5, 16 /* *(d + 16) = t1 */
108 beqi r9, a_block_u1 /* t1 was 1 => 1 byte offset */
110 beqi r9, a_block_u2 /* t1 was 2 => 2 byte offset */
116 bsrli r9, r12, 8 /* t1 = v >> 8 */
117 or r9, r11, r9 /* t1 = h | t1 */
118 swi r9, r5, 0 /* *(d + 0) = t1 */
[all …]
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| /openbmc/u-boot/board/imgtec/malta/ |
| H A D | lowlevel_init.S | 38 li t1, MALTA_REVISION_CORID_CORE_LV
39 beq t0, t1, _gt64120
42 li t1, MALTA_REVISION_CORID_CORE_FPGA6
43 beq t0, t1, _msc01
65 PTR_LI t1, CKSEG1ADDR(GT_DEF_BASE)
67 sw t0, GT_ISD_OFS(t1)
70 PTR_LI t1, CKSEG1ADDR(MALTA_GT_BASE)
74 sw t0, GT_PCI0IOLD_OFS(t1)
76 sw t0, GT_PCI0IOHD_OFS(t1)
80 sw t0, GT_PCI0M0LD_OFS(t1)
[all …]
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| /openbmc/linux/tools/testing/kunit/test_data/ |
| H A D | test_multiple_prefixes.log | 1 [ 0.060000][ T1] printk: console [mc-1] enabled
2 [ 0.060000][ T1] random: get_random_bytes called from init_oops_id+0x35/0x40 with crng_init=0
3 [ 0.060000][ T1] TAP version 14
4 [ 0.060000][ T1] 1..3
5 [ 0.060000][ T1] # Subtest: kunit-resource-test
6 [ 0.060000][ T1] 1..5
7 [ 0.060000][ T1] ok 1 - kunit_resource_test_init_resources
8 [ 0.060000][ T1] ok 2 - kunit_resource_test_alloc_resource
9 [ 0.060000][ T1] ok 3 - kunit_resource_test_destroy_resource
10 [ 0.060000][ T1] ok 4 - kunit_resource_test_cleanup_resources
[all …]
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| /openbmc/u-boot/arch/mips/mach-ath79/qca953x/ |
| H A D | lowlevel_init.S | 102 lw t1, QCA953X_RESET_REG_RESET_MODULE(t0)
104 or t1, t1, t2
105 sw t1, QCA953X_RESET_REG_RESET_MODULE(t0)
107 lw t1, QCA953X_RESET_REG_RESET_MODULE(t0)
109 and t1, t1, t2
110 sw t1, QCA953X_RESET_REG_RESET_MODULE(t0)
115 li t1, 0x01
116 sw t1, QCA953X_RTC_REG_SYNC_RESET(t0)
122 lw t1, QCA953X_RTC_REG_SYNC_STATUS(t0)
123 andi t1, t1, 0x02
[all …]
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| /openbmc/linux/arch/mips/kernel/ |
| H A D | cps-vec.S | 176 1: PTR_L t1, VPEBOOTCFG_PC(v1)
179 jr t1
239 PTR_LA t1, 1f
240 jr.hb t1
270 sll t1, ta1, VPECONF0_XTC_SHIFT
271 or t0, t0, t1
307 li t1, COREBOOTCFG_SIZE
308 mul t0, t0, t1
309 PTR_LA t1, mips_cps_core_bootcfg
310 PTR_L t1, 0(t1)
[all …]
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| H A D | octeon_switch.S | 26 mfc0 t1, CP0_STATUS
27 LONG_S t1, THREAD_STATUS(a0)
41 li t1, -32768 /* Base address of CVMSEG */
46 LONG_L t8, 0(t1) /* Load from CVMSEG */
48 LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */
49 LONG_ADDU t1, LONGSIZE*2 /* Increment loc in CVMSEG */
77 set_saved_sp t0, t1, t2
79 mfc0 t1, CP0_STATUS /* Do we really need this? */
81 and t1, a3
85 or a2, t1
[all …]
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| /openbmc/linux/tools/testing/selftests/netfilter/ |
| H A D | nft_audit.sh | 63 for table in t1 t2; do
104 do_test "nft add set t1 s $setblock" \
105 "table=t1 family=2 entries=4 op=nft_register_set"
107 do_test "nft add set t1 s2 $setblock; add set t1 s3 { $settype; }" \
108 "table=t1 family=2 entries=5 op=nft_register_set"
110 do_test "nft add element t1 s3 $setelem" \
111 "table=t1 family=2 entries=3 op=nft_register_setelem"
115 do_test 'nft add counter t1 c1' \
116 'table=t1 family=2 entries=1 op=nft_register_obj'
129 do_test 'nft add quota t1 q1 { 10 bytes }' \
[all …]
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| /openbmc/linux/arch/riscv/lib/ |
| H A D | strlen.S | 21 * t0, t1
23 mv t1, a0
25 lbu t0, 0(t1)
27 addi t1, t1, 1
30 sub a0, t1, a0
58 * t0, t1, t2, t3
72 REG_L t1, 0(t0)
79 SHIFT t1, t1, t2
82 orc.b t1, t1
85 not t1, t1
[all …]
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| /openbmc/linux/arch/csky/abiv2/ |
| H A D | strcmp.S | 13 andi t1, a0, 0x3
14 bnez t1, 5f
19 ldw t1, (a1, 0)
21 cmpne t0, t1
29 ldw t1, (a1, 4)
30 cmpne t0, t1
36 ldw t1, (a1, 8)
37 cmpne t0, t1
43 ldw t1, (a1, 12)
44 cmpne t0, t1
[all …]
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| /openbmc/qemu/docs/devel/ |
| H A D | tcg-ops.rst | 62 add_i32 t0, t1, t2 /* (t0 <- t1 + t2) */
207 add_i32 t0, t1, t2
242 * - brcond_i32/i64 *t0*, *t1*, *cond*, *label*
244 - | Conditional jump if *t0* *cond* *t1* is true. *cond* can be:
256 | ``TCG_COND_TSTEQ /* t1 & t2 == 0 */``
257 | ``TCG_COND_TSTNE /* t1 & t2 != 0 */``
264 * - add_i32/i64 *t0*, *t1*, *t2*
266 - | *t0* = *t1* + *t2*
268 * - sub_i32/i64 *t0*, *t1*, *t2*
270 - | *t0* = *t1* - *t2*
[all …]
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| /openbmc/linux/arch/x86/crypto/ |
| H A D | aesni-intel_avx-x86_64.S | 571 .macro CALC_AAD_HASH GHASH_MUL AAD AADLEN T1 T2 T3 T4 T5 T6 T7 T8
587 \GHASH_MUL \T8, \T2, \T1, \T3, \T4, \T5, \T6
605 movq (%r10), \T1
608 vpslldq $8, \T1, \T1
610 vpxor \T1, \T7, \T7
616 movq %rax, \T1
619 vpslldq $12, \T1, \T1
621 vpxor \T1, \T7, \T7
628 vmovdqu 16(%r11), \T1
631 vpand \T1, \T7, \T7
[all …]
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| /openbmc/linux/arch/alpha/lib/ |
| H A D | stxcpy.S | 44 t1 == the first source word. */
49 mskqh t1, a1, t3 # e0 :
50 ornot t1, t2, t2 # .. e1 :
53 or t0, t3, t1 # e0 :
58 t1 == a source word not containing a null. */
61 stq_u t1, 0(a0) # e0 :
63 ldq_u t1, 0(a1) # e0 :
65 cmpbge zero, t1, t8 # e0 (stall)
70 t1 == the source word containing the null
85 zapnot t1, t6, t1 # e0 : clear src bytes >= null
[all …]
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| H A D | ev6-stxcpy.S | 55 t1 == the first source word. */
60 mskqh t1, a1, t3 # U :
61 ornot t1, t2, t2 # E : (stall)
65 or t0, t3, t1 # E : (stall)
70 t1 == a source word not containing a null. */
74 stq_u t1, 0(a0) # L :
79 ldq_u t1, 0(a1) # L : Latency=3
81 cmpbge zero, t1, t8 # E : (3 cycle stall)
86 t1 == the source word containing the null
100 zapnot t1, t6, t1 # U : clear src bytes >= null (stall)
[all …]
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| /openbmc/u-boot/arch/riscv/cpu/ |
| H A D | start.S | 57 li t1, CONFIG_SYS_INIT_SP_ADDR
58 and sp, t1, t0 /* force 16 byte alignment */
103 mv t1, s4 /* t1 <- scratch for copy_loop */
111 SREG t5, 0(t1)
112 addi t1, t1, REGBYTES
119 la t1, __rel_dyn_start
121 beq t1, t2, clear_bss
122 add t1, t1, t6 /* t1 <- rela_dyn_start in RAM */
128 bne t1, t2, 7f
131 LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */
[all …]
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| /openbmc/qemu/target/mips/tcg/ |
| H A D | mxu_translate.c | 720 TCGv t0, t1; in gen_mxu_s8ldd() local
724 t1 = tcg_temp_new(); in gen_mxu_s8ldd()
740 tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); in gen_mxu_s8ldd()
742 tcg_gen_deposit_tl(t0, t0, t1, 0, 8); in gen_mxu_s8ldd()
746 tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); in gen_mxu_s8ldd()
748 tcg_gen_deposit_tl(t0, t0, t1, 8, 8); in gen_mxu_s8ldd()
752 tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); in gen_mxu_s8ldd()
754 tcg_gen_deposit_tl(t0, t0, t1, 16, 8); in gen_mxu_s8ldd()
758 tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); in gen_mxu_s8ldd()
760 tcg_gen_deposit_tl(t0, t0, t1, 24, 8); in gen_mxu_s8ldd()
[all …]
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| H A D | loong_translate.c | 31 TCGv t0, t1; in gen_lext_DIV_G() local
40 t1 = tcg_temp_new(); in gen_lext_DIV_G()
46 gen_load_gpr(t1, rt); in gen_lext_DIV_G()
50 tcg_gen_ext32s_tl(t1, t1); in gen_lext_DIV_G()
52 tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); in gen_lext_DIV_G()
58 tcg_gen_brcondi_tl(TCG_COND_NE, t1, -1LL, l2); in gen_lext_DIV_G()
63 tcg_gen_div_tl(cpu_gpr[rd], t0, t1); in gen_lext_DIV_G()
85 TCGv t0, t1; in gen_lext_DIVU_G() local
94 t1 = tcg_temp_new(); in gen_lext_DIVU_G()
99 gen_load_gpr(t1, rt); in gen_lext_DIVU_G()
[all …]
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| /openbmc/sdbusplus/test/vtable/ |
| H A D | vtable.cpp | 34 constexpr bool operator==(const sd_bus_vtable& t1, const sd_bus_vtable& t2) in operator ==() argument
36 if (t1.type != t2.type || t1.flags != t2.flags) in operator ==()
41 switch (t1.type) in operator ==()
44 return t1.x.start.element_size == t2.x.start.element_size && in operator ==()
45 t1.x.start.features == t2.x.start.features; in operator ==()
49 // && t1.x.start.vtable_format_reference in operator ==()
54 constexpr uint8_t allZeors[sizeof(t1.x)] = {0}; in operator ==()
55 return memcmp(&t1.x, allZeors, sizeof(t1.x)) == 0 && in operator ==()
59 return strcmp(t1.x.method.member, t2.x.method.member) == 0 && in operator ==()
60 strcmp(t1.x.method.signature, t2.x.method.signature) == 0 && in operator ==()
[all …]
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| /openbmc/u-boot/arch/mips/mach-mt7620/ |
| H A D | lowlevel_init.S | 71 li t1, DELAY_USEC(1000000)
77 subu t1, t1, 1
78 bgtz t1, 1b
88 lw t1, 0(t0)
90 and t1, t1, t2
91 ori t1, t1, 0xc
92 sw t1, 0(t0)
121 li t1, 0x1
123 sub t0, t0, t1
209 lw t1, 0x10(s0)
[all …]
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| /openbmc/linux/drivers/soc/bcm/brcmstb/pm/ |
| H A D | s2-mips.S | 52 addiu t1, s3, -1
53 not t1
56 and t0, t1
59 and t2, t1
68 2: move t1, s4
69 cache 0x1c, 0(t1)
70 addu t1, s3
89 li t1, ~(ST0_IM | ST0_IE)
90 and t0, t1
121 lw t1, TIMER_TIMER1_STAT(s2)
[all …]
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| /openbmc/linux/arch/mips/include/asm/mach-cavium-octeon/ |
| H A D | kernel-entry-init.h | 47 and t1, v1, 0xfff8
48 xor t1, t1, 0x9000 # 63-P1
49 beqz t1, 4f
50 and t1, v1, 0xfff8
51 xor t1, t1, 0x9008 # 63-P2
52 beqz t1, 4f
53 and t1, v1, 0xfff8
54 xor t1, t1, 0x9100 # 68-P1
55 beqz t1, 4f
56 and t1, v1, 0xff00
[all …]
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| /openbmc/u-boot/arch/mips/lib/ |
| H A D | cache_init.S | 147 lw t1, GCR_L2_CONFIG(t0)
148 bgez t1, l2_probe_done
150 ext R_L2_LINE, t1, \
156 ext t2, t1, GCR_L2_CONFIG_ASSOC_SHIFT, GCR_L2_CONFIG_ASSOC_BITS
160 ext t2, t1, GCR_L2_CONFIG_SETSZ_SHIFT, GCR_L2_CONFIG_SETSZ_BITS
166 or t1, t1, GCR_L2_CONFIG_BYPASS
167 sw t1, GCR_L2_CONFIG(t0)
195 li t1, 2
196 sllv R_L2_LINE, t1, R_L2_LINE
198 srl t1, t0, MIPS_CONF2_SA_SHF
[all …]
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