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/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Drenesas,sdhi.yaml4 $id: http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#
7 title: Renesas SDHI SD/MMC controller
16 - const: renesas,sdhi-sh73a0 # R-Mobile APE6
18 - const: renesas,sdhi-r7s72100 # RZ/A1H
20 - const: renesas,sdhi-r7s9210 # SH-Mobile AG5
22 - const: renesas,sdhi-r8a73a4 # R-Mobile APE6
24 - const: renesas,sdhi-r8a7740 # R-Mobile A1
27 - renesas,sdhi-r8a7778 # R-Car M1
28 - renesas,sdhi-r8a7779 # R-Car H1
29 - const: renesas,rcar-gen1-sdhi # R-Car Gen1
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/openbmc/linux/drivers/mmc/host/
H A Drenesas_sdhi_sys_dmac.c3 * DMA support use of SYS DMAC with SDHI SD/SDIO controller
75 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
76 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
77 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
78 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
79 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
80 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
81 { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
82 { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
83 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
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H A Drenesas_sdhi_internal_dmac.c3 * DMA support for Internal DMAC with SDHI SD/SDIO controller
70 * - Since this SDHI DMAC register set has 16 but 32-bit width, we
77 * ES1.0, when multiple SDHI channels use RX DMAC simultaneously, sometimes
278 { .compatible = "renesas,sdhi-r7s9210", .data = &of_rza2_compatible, },
279 { .compatible = "renesas,sdhi-mmc-r8a77470", .data = &of_rcar_gen3_compatible, },
280 { .compatible = "renesas,sdhi-r8a7795", .data = &of_r8a7795_compatible, },
281 { .compatible = "renesas,sdhi-r8a77961", .data = &of_r8a77961_compatible, },
282 { .compatible = "renesas,sdhi-r8a77965", .data = &of_r8a77965_compatible, },
283 { .compatible = "renesas,sdhi-r8a77970", .data = &of_r8a77970_compatible, },
284 { .compatible = "renesas,sdhi-r8a77990", .data = &of_r8a77990_compatible, },
[all …]
H A Drenesas_sdhi_core.c3 * Renesas SDHI
1002 /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */ in renesas_sdhi_probe()
1026 * All SDHI blocks support 2-byte and larger block sizes in 4-bit in renesas_sdhi_probe()
1032 * All SDHI blocks support SDIO IRQ signalling. in renesas_sdhi_probe()
1036 /* All SDHI have CMD12 control bit */ in renesas_sdhi_probe()
1039 /* All SDHI have SDIO status bits which must be 1 */ in renesas_sdhi_probe()
1042 /* All SDHI support HW busy detection */ in renesas_sdhi_probe()
1052 /* GEN2_SDR104 is first known SDHI to use 32bit block count */ in renesas_sdhi_probe()
1056 /* One Gen2 SDHI incarnation does NOT have a CBSY bit */ in renesas_sdhi_probe()
H A DKconfig669 tristate "Renesas SDHI SD/SDIO controller support"
674 This provides support for the SDHI SD/SDIO controller found in
678 tristate "DMA for SDHI SD/SDIO controllers using SYS-DMAC"
682 This provides DMA support for SDHI SD/SDIO controllers
687 tristate "DMA for SDHI SD/SDIO controllers using on-chip bus mastering"
692 This provides DMA support for SDHI SD/SDIO controllers
H A Drenesas_sdhi.h3 * Renesas Mobile SDHI
/openbmc/u-boot/drivers/mmc/
H A Drenesas-sdhi.c427 { .compatible = "renesas,sdhi-r8a7790", .data = RENESAS_GEN2_QUIRKS },
428 { .compatible = "renesas,sdhi-r8a7791", .data = RENESAS_GEN2_QUIRKS },
429 { .compatible = "renesas,sdhi-r8a7792", .data = RENESAS_GEN2_QUIRKS },
430 { .compatible = "renesas,sdhi-r8a7793", .data = RENESAS_GEN2_QUIRKS },
431 { .compatible = "renesas,sdhi-r8a7794", .data = RENESAS_GEN2_QUIRKS },
432 { .compatible = "renesas,sdhi-r8a7795", .data = RENESAS_GEN3_QUIRKS },
433 { .compatible = "renesas,sdhi-r8a7796", .data = RENESAS_GEN3_QUIRKS },
434 { .compatible = "renesas,sdhi-r8a77965", .data = RENESAS_GEN3_QUIRKS },
435 { .compatible = "renesas,sdhi-r8a77970", .data = RENESAS_GEN3_QUIRKS },
436 { .compatible = "renesas,sdhi-r8a77990", .data = RENESAS_GEN3_QUIRKS },
[all …]
H A Dsh_sdhi.c24 #define DRIVER_NAME "sh-sdhi"
444 /* SDHI REGISTER SPECIFICATION */ in sh_sdhi_get_response()
544 /* SDHI sends the STOP command automatically by STOP reg */ in sh_sdhi_start_cmd()
890 { .compatible = "renesas,sdhi-r8a7795", .data = SH_SDHI_QUIRK_64BIT_BUF },
891 { .compatible = "renesas,sdhi-r8a7796", .data = SH_SDHI_QUIRK_64BIT_BUF },
896 .name = "sh-sdhi-mmc",
/openbmc/u-boot/arch/arm/dts/
H A Dr8a77990-u-boot.dtsi20 compatible = "renesas,sdhi-r8a77990";
28 compatible = "renesas,sdhi-r8a77990";
36 compatible = "renesas,sdhi-r8a77990";
/openbmc/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7366.c265 SDHI, CMT, TSIF, SIU, enumerator
296 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
297 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
356 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
H A Dsetup-sh7343.c323 IRDA, SDHI, CMT, TSIF, SIU, enumerator
358 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
359 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
417 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
H A Dsetup-sh7722.c544 SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, enumerator
571 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
572 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
633 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, 0, 0, SDHI } },
H A Dsetup-sh7734.c362 SDHI, enumerator
437 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2),
467 SDHI, /* SDHI 0-2 */
503 { TMU30, TMU60, RTC, SDHI } },
H A Dsetup-sh7757.c791 SDHI, DVC, enumerator
842 INTC_VECT(SDHI, 0x480), INTC_VECT(SDHI, 0x04a0),
843 INTC_VECT(SDHI, 0x4c0),
968 HUDI, 0, 0, SCIF3, SCIF2, SDHI, TMU345, TMU012
1062 { INT2PRI1, 0, 32, 8, { TMU3, TMU4, TMU5, SDHI } },
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g011.dtsi73 compatible = "renesas,sdhi-r9a09g011",
74 "renesas,rcar-gen3-sdhi";
89 compatible = "renesas,sdhi-r9a09g011",
90 "renesas,rcar-gen3-sdhi";
105 compatible = "renesas,sdhi-r9a09g011",
106 "renesas,rcar-gen3-sdhi";
/openbmc/linux/arch/sh/kernel/cpu/sh2a/
H A Dsetup-sh7203.c36 /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */
37 ROMDEC, FLCTL, SDHI, RTC, RCAN0, RCAN1, enumerator
122 INTC_IRQ(SDHI, 228), INTC_IRQ(SDHI, 229),
123 INTC_IRQ(SDHI, 230),
160 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } },
H A Dsetup-sh7264.c42 NFMC, SDHI, RTC, enumerator
160 INTC_IRQ(SDHI, 292), INTC_IRQ(SDHI, 293),
161 INTC_IRQ(SDHI, 294),
213 { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } },
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7779.dtsi455 compatible = "renesas,sdhi-r8a7779",
456 "renesas,rcar-gen1-sdhi";
465 compatible = "renesas,sdhi-r8a7779",
466 "renesas,rcar-gen1-sdhi";
475 compatible = "renesas,sdhi-r8a7779",
476 "renesas,rcar-gen1-sdhi";
485 compatible = "renesas,sdhi-r8a7779",
486 "renesas,rcar-gen1-sdhi";
H A Dr8a7778.dtsi408 compatible = "renesas,sdhi-r8a7778",
409 "renesas,rcar-gen1-sdhi";
418 compatible = "renesas,sdhi-r8a7778",
419 "renesas,rcar-gen1-sdhi";
428 compatible = "renesas,sdhi-r8a7778",
429 "renesas,rcar-gen1-sdhi";
/openbmc/u-boot/arch/arm/mach-rmobile/include/mach/
H A Dr8a7792.h30 /* SDHI */
H A Dr8a7794.h29 /* SDHI */
H A Dr8a7790.h30 /* SDHI */
H A Dsh_sdhi.h3 * drivers/mmc/sh-sdhi.h
49 /* SDHI CMD VALUE */
H A Dr8a7791.h19 /* SDHI */
H A Dr8a7793.h20 /* SDHI */

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