/openbmc/linux/drivers/iio/imu/ |
H A D | fxos8700_i2c.c | 5 * 7-bit I2C slave address determined by SA1 and SA0 logic level 7 * SA1 | SA0 | Slave Address
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/openbmc/linux/arch/hexagon/kernel/ |
H A D | ptrace.c | 50 membuf_store(&to, regs->sa0); in genregs_get() 95 INEXT(®s->sa0, sa0); in genregs_set()
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H A D | signal.c | 43 err |= __put_user(regs->sa0, &sc->sc_regs.sa0); in setup_sigcontext() 73 err |= __get_user(regs->sa0, &sc->sc_regs.sa0); in restore_sigcontext()
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H A D | vm_events.c | 29 printk(KERN_EMERG "lc0: \t0x%08lx sa0: 0x%08lx m0: 0x%08lx\n", in show_regs() 30 regs->lc0, regs->sa0, regs->m0); in show_regs()
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H A D | kgdb.c | 57 { "sa0", GDB_SIZEOF_REG, offsetof(struct pt_regs, sa0)},
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H A D | vm_entry.S | 54 R14 = sa0; } \ 143 sa0 = R14; } \
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/openbmc/qemu/tests/tcg/hexagon/ |
H A D | unaligned_pc.c | 28 "sa0 = r0\n" in test_endloop() 32 : "r0", "sa0", "lc0", "usr"); in test_endloop()
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H A D | overflow.c | 126 : "r2", "usr", "p3", "sa0", "lc0"); in test_packet()
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/openbmc/linux/arch/powerpc/math-emu/ |
H A D | math_efp.c | 489 FP_DECL_S(SA0); FP_DECL_S(SB0); FP_DECL_S(SR0); in do_spe_mathemu() 496 FP_UNPACK_SP(SA0, va.wp); in do_spe_mathemu() 504 FP_UNPACK_SP(SA0, va.wp); in do_spe_mathemu() 509 pr_debug("SA0: %d %08x %d (%d)\n", in do_spe_mathemu() 535 FP_ADD_S(SR0, SA0, SB0); in do_spe_mathemu() 540 FP_SUB_S(SR0, SA0, SB0); in do_spe_mathemu() 545 FP_MUL_S(SR0, SA0, SB0); in do_spe_mathemu() 550 FP_DIV_S(SR0, SA0, SB0); in do_spe_mathemu() 641 FP_CMP_S(IR0, SA0, SB0, 3); in do_spe_mathemu() 643 if (IR0 == 3 && (FP_ISSIGNAN_S(SA0) || FP_ISSIGNAN_S(SB0))) in do_spe_mathemu()
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/openbmc/linux/arch/hexagon/include/asm/ |
H A D | elf.h | 134 DEST.sa0 = REGS->sa0; \
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H A D | kgdb.h | 21 * 32 gpr + sa0/1 + lc0/1 + m0/1 + gp + ugp + pred + pc = 42 total.
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H A D | page.h | 110 : "lc0", "sa0", "memory" in clear_page()
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/openbmc/linux/drivers/iio/magnetometer/ |
H A D | rm3100-i2c.c | 7 * i2c slave address: 0x20 + SA1 << 1 + SA0.
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/openbmc/qemu/linux-user/hexagon/ |
H A D | signal.c | 35 target_ulong sa0; member 111 __put_user(env->gpr[HEX_REG_SA0], &sc->sa0); in setup_sigcontext() 227 __get_user(env->gpr[HEX_REG_SA0], &sc->sa0); in restore_sigcontext()
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/openbmc/linux/arch/hexagon/include/uapi/asm/ |
H A D | user.h | 46 unsigned long sa0; member
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H A D | registers.h | 52 unsigned long sa0; member
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/openbmc/linux/Documentation/devicetree/bindings/iio/imu/ |
H A D | st,lsm6dsx.yaml | 85 connected through a pull-up with other chip lines (e.g. SDO/SA0).
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/openbmc/u-boot/drivers/net/ |
H A D | lpc32xx_eth.c | 94 u32 sa0; /* Station address register 0 */ member 437 (dev->enetaddr[5] << 8)), ®s->sa0); in lpc32xx_eth_write_hwaddr() 488 (dev->enetaddr[5] << 8)), ®s->sa0); in lpc32xx_eth_init()
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H A D | pic32_eth.h | 52 struct pic32_reg_atomic sa0; /* 0x300 */ member
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/openbmc/qemu/target/hexagon/idef-parser/ |
H A D | macros.h.inc | 100 #define fWRITE_LOOP_REGS0(START, COUNT) SA0 = START; (LC0 = COUNT)
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/openbmc/qemu/target/hexagon/ |
H A D | attribs_def.h.inc | 108 DEF_ATTRIB(IMPLICIT_WRITES_SA0, "Writes start addr for loop 0", "", "UREG.SA0")
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H A D | cpu.c | 64 "sa0", "lc0", "sa1", "lc1", "p3_0", "c5", "m0", "m1",
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/openbmc/u-boot/arch/arm/include/asm/ |
H A D | macro.h | 268 * CP15BEN,SA0,SA,C,A,M to 0
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/openbmc/qemu/gdb-xml/ |
H A D | hexagon-core.xml | 51 …<reg name="sa0" bitsize="32" offset="128" encoding="uint" format="hex" group="Thread …
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/openbmc/linux/drivers/net/wan/ |
H A D | hd64570.h | 64 #define SA0 0x12 /* Sync/Address 0 */ macro
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