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/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8544si-post.dtsi2 * MPC8544 Silicon/SoC Device Tree Source (post include)
38 compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus";
142 compatible = "fsl,mpc8544-immr", "simple-bus";
152 compatible = "fsl,mpc8544-ecm", "fsl,ecm";
158 compatible = "fsl,mpc8544-memory-controller";
168 compatible = "fsl,mpc8544-l2-cache-controller";
187 compatible = "fsl,mpc8544-guts";
H A Dmpc8544si-pre.dtsi2 * MPC8544 Silicon/SoC Device Tree Source (pre include)
40 compatible = "fsl,MPC8544";
H A Dmpc8544ds.dts3 * MPC8544 DS Device Tree Source
/openbmc/linux/arch/powerpc/boot/dts/
H A Dsocrates.dts3 * Device Tree Source for the Socrates board (MPC8544).
55 compatible = "fsl,mpc8544-immr", "simple-bus";
64 compatible = "fsl,mpc8544-ecm", "fsl,ecm";
71 compatible = "fsl,mpc8544-memory-controller";
78 compatible = "fsl,mpc8544-l2-cache-controller";
90 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
122 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
233 compatible = "fsl,mpc8544-localbus",
/openbmc/qemu/hw/ppc/
H A Dmpc8544_guts.c2 * QEMU PowerPC MPC8544 global util pseudo-device
15 * The documentation for this device is noted in the MPC8544 documentation,
63 #define TYPE_MPC8544_GUTS "mpc8544-guts"
139 "mpc8544.guts", MPC8544_GUTS_MMIO_SIZE); in mpc8544_guts_initfn()
H A De500.c387 char compatible_sb[] = "fsl,mpc8544-immr\0simple-bus"; in ppce500_load_device_tree()
587 qemu_fdt_setprop_string(fdt, gutil, "compatible", "fsl,mpc8544-guts"); in ppce500_load_device_tree()
1055 dev = qdev_new("mpc8544-guts"); in ppce500_init()
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mpc.yaml25 - fsl,mpc8544-i2c
90 /* MPC8544 base board */
94 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
/openbmc/linux/arch/powerpc/platforms/85xx/
H A DKconfig81 bool "Freescale MPC8544 DS / MPC8572 DS"
87 This option enables support for the MPC8544 DS and MPC8572 DS boards
H A Dmpc85xx_ds.c75 .name = "MPC8544 DS", in define_machine()
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/fsl/
H A Dfsl,ddr.yaml31 - fsl,mpc8544-memory-controller
/openbmc/linux/Documentation/devicetree/bindings/cache/
H A Dfreescale-l2cache.txt17 "fsl,mpc8544-l2-cache-controller"
/openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Decm.txt47 CHIP is the processor (mpc8572, mpc8544, etc.)
H A Dmpic.txt162 * The MPC8544 I2C controller node has an internal
/openbmc/linux/drivers/edac/
H A Dmpc85xx_edac.c616 { .compatible = "fsl,mpc8544-l2-cache-controller", },
644 { .compatible = "fsl,mpc8544-memory-controller", },
/openbmc/linux/drivers/soc/fsl/
H A Dguts.c165 { .compatible = "fsl,mpc8544-guts", },
/openbmc/qemu/target/ppc/
H A Dcpu-models.c351 POWERPC_DEF_SVR("mpc8544_v10", "MPC8544 v1.0",
353 POWERPC_DEF_SVR("mpc8544_v11", "MPC8544 v1.1",
846 { "mpc8544", "mpc8544_v11" },
/openbmc/linux/drivers/i2c/busses/
H A Di2c-mpc.c374 * and MPC8544 indicate SEC frequency ratio in mpc_i2c_get_sec_cfg_8xxx()
951 {.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
/openbmc/linux/arch/powerpc/sysdev/
H A Dmpic.c1565 * mpc8536). It is not present in MPIC 2.0 (e.g. mpc8544). in mpic_init()