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32 pin doubles as the IQS7211E's active-low MCLR input, in which case this38 Specifies the GPIO connected to the device's active-low MCLR input. The
37 Specifies the GPIO connected to the device's active-low MCLR input. The
1220 * The following delay ensures the shared RDY/MCLR pin is sampled in in iqs7211_hard_reset()2465 * If an extra CTx pin is present, the RDY and MCLR pins are combined in iqs7211_probe()