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/openbmc/linux/drivers/firmware/efi/libstub/
H A Dgop.c1 // SPDX-License-Identifier: GPL-2.0
2 /* -----------------------------------------------------------------------
6 * ----------------------------------------------------------------------- */
29 u32 mode; member
40 u32 m; in parse_modenum() local
42 if (!strstarts(option, "mode=")) in parse_modenum()
44 option += strlen("mode="); in parse_modenum()
45 m = simple_strtoull(option, &option, 0); in parse_modenum()
49 cmdline.mode = m; in parse_modenum()
58 int pf = -1; in parse_res()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_debugfs_params.c1 // SPDX-License-Identifier: MIT
15 (strcmp((_file)->f_path.dentry->d_name.name, (_name)) == 0)
25 static int i915_param_int_show(struct seq_file *m, void *data) in i915_param_int_show() argument
27 int *value = m->private; in i915_param_int_show()
29 seq_printf(m, "%d\n", *value); in i915_param_int_show()
36 return single_open(file, i915_param_int_show, inode->i_private); in i915_param_int_open()
43 if (intel_uc_uses_guc_submission(&to_gt(i915)->uc)) in notify_guc()
44 ret = intel_guc_global_policies_update(&to_gt(i915)->uc.guc); in notify_guc()
53 struct seq_file *m = file->private_data; in i915_param_int_write() local
54 int *value = m->private; in i915_param_int_write()
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/openbmc/openbmc/poky/bitbake/lib/hashserv/
H A Dclient.py3 # SPDX-License-Identifier: GPL-2.0-only
43 # In the event of a restart due to a reconnect, all in-flight
45 for m in self.pending:
46 await socket.send(m)
48 for m in msgs:
52 self.pending.append(m)
56 await socket.send(m)
84 self.mode = self.MODE_NORMAL
91 self.mode = self.MODE_NORMAL
100 async def send_stream_batch(self, mode, msgs): argument
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/openbmc/linux/arch/mips/sgi-ip27/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 prompt "Node addressing mode"
8 bool "IP27 M-Mode"
11 in either N-Modes which allows for more nodes or M-Mode which allows
13 M-Mode, so choose M-mode here.
16 bool "IP27 N-Mode"
19 in either N-Modes which allows for more nodes or M-Mode which allows
21 M-Mode, so choose M-mode here.
/openbmc/linux/include/uapi/mtd/
H A Dmtd-abi.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
55 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
56 * this mode implies %MTD_OPS_PLACE_OOB
69 * struct mtd_write_req - data structure for requesting a write operation
74 * @usr_data: user-provided data buffer
75 * @usr_oob: user-provided OOB buffer
76 * @mode: MTD mode (see "MTD operation modes")
80 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
[all …]
/openbmc/u-boot/include/mtd/
H A Dmtd-abi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
45 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
46 * this mode implies %MTD_OPS_PLACE_OOB
59 * struct mtd_write_req - data structure for requesting a write operation
64 * @usr_data: user-provided data buffer
65 * @usr_oob: user-provided OOB buffer
66 * @mode: MTD mode (see "MTD operation modes")
70 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
71 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
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/openbmc/linux/drivers/usb/dwc3/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
10 Say Y or M here if your system has a Dual Role SuperSpeed
26 bool "DWC3 Mode Selection"
32 bool "Host only mode"
35 Select this when you want to use DWC3 in host mode only,
39 bool "Gadget only mode"
42 Select this when you want to use DWC3 in gadget mode only,
46 bool "Dual Role mode"
49 This is the default mode of working of DWC3 controller where
66 Say 'Y' or 'M' here if you have one such device
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/openbmc/linux/drivers/net/team/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 To compile this driver as a module, choose M here: the module
19 tristate "Broadcast mode support"
22 Basic mode where packets are transmitted always by all suitable ports.
26 To compile this team mode as a module, choose M here: the module
30 tristate "Round-robin mode support"
33 Basic mode where port used for transmitting packets is selected in
34 round-robin fashion using packet counter.
38 To compile this team mode as a module, choose M here: the module
42 tristate "Random mode support"
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/openbmc/linux/tools/perf/pmu-events/arch/s390/cf_zec12/
H A Dextended.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
24 "Unit": "CPU-M-CF",
28 … "A directory write to the Level-1 Instruction cache directory where the returned cache line was s…
31 "Unit": "CPU-M-CF",
35 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
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/openbmc/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dhead.c43 .mask = asyh->clr.mask & ~(flush ? 0 : asyh->set.mask), in nv50_head_flush_clr()
46 if (clr.olut) head->func->olut_clr(head); in nv50_head_flush_clr()
47 if (clr.core) head->func->core_clr(head); in nv50_head_flush_clr()
48 if (clr.curs) head->func->curs_clr(head); in nv50_head_flush_clr()
54 if (asyh->set.curs ) head->func->curs_set(head, asyh); in nv50_head_flush_set_wndw()
55 if (asyh->set.olut ) { in nv50_head_flush_set_wndw()
56 asyh->olut.offset = nv50_lut_load(&head->olut, in nv50_head_flush_set_wndw()
57 asyh->olut.buffer, in nv50_head_flush_set_wndw()
58 asyh->state.gamma_lut, in nv50_head_flush_set_wndw()
59 asyh->olut.load); in nv50_head_flush_set_wndw()
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/openbmc/u-boot/drivers/video/sunxi/
H A Dlcdc.c1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2013-2014 Luc Verhaegen <libv@skynet.be>
6 * (C) Copyright 2014-2015 Hans de Goede <hdegoede@redhat.com>
16 static int lcdc_get_clk_delay(const struct display_timing *mode, int tcon) in lcdc_get_clk_delay() argument
20 delay = mode->vfront_porch.typ + mode->vsync_len.typ + in lcdc_get_clk_delay()
21 mode->vback_porch.typ; in lcdc_get_clk_delay()
22 if (mode->flags & DISPLAY_FLAGS_INTERLACED) in lcdc_get_clk_delay()
25 delay -= 2; in lcdc_get_clk_delay()
33 writel(0, &lcdc->ctrl); /* Disable tcon */ in lcdc_init()
34 writel(0, &lcdc->int0); /* Disable all interrupts */ in lcdc_init()
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/openbmc/linux/kernel/bpf/
H A Dinode.c1 // SPDX-License-Identifier: GPL-2.0-only
92 return ERR_PTR(-EINVAL); in bpf_fd_probe_obj()
103 umode_t mode) in bpf_get_inode() argument
107 switch (mode & S_IFMT) { in bpf_get_inode()
113 return ERR_PTR(-EINVAL); in bpf_get_inode()
118 return ERR_PTR(-ENOSPC); in bpf_get_inode()
120 inode->i_ino = get_next_ino(); in bpf_get_inode()
121 inode->i_atime = inode_set_ctime_current(inode); in bpf_get_inode()
122 inode->i_mtime = inode->i_atime; in bpf_get_inode()
124 inode_init_owner(&nop_mnt_idmap, inode, dir, mode); in bpf_get_inode()
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/openbmc/u-boot/drivers/bios_emulator/
H A Dbiosemu.c9 * Copyright (C) 1996-1999 SciTech Software, Inc.
41 * Jason ported this file to u-boot to run the ATI video card BIOS
42 * in u-boot. Made all the video memory be emulated during the
76 debugFlags - Flags to enable debugging options (debug builds only)
77 memSize - Amount of memory to allocate for real mode machine
78 info - Pointer to default VGA device information
90 memset(&M, 0, sizeof(M)); in BE_init()
96 M.mem_base = malloc(memSize); in BE_init()
98 if (M.mem_base == NULL){ in BE_init()
102 M.mem_size = memSize; in BE_init()
[all …]
/openbmc/linux/sound/soc/intel/boards/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
52 Say Y or m if you have such a device.
84 Say Y or m if you have such a device.
96 Say Y or m if you have such a device. This is a recommended option.
103 tristate "Baytrail and Baytrail-CR with RT5640 codec"
110 This adds support for ASoC machine driver for Intel(R) Baytrail and Baytrail-CR
112 Say Y or m if you have such a device. This is a recommended option.
116 tristate "Baytrail and Baytrail-CR with RT5651 codec"
123 This adds support for ASoC machine driver for Intel(R) Baytrail and Baytrail-CR
125 Say Y or m if you have such a device. This is a recommended option.
[all …]
/openbmc/linux/Documentation/fb/
H A Dmodedb.rst2 modedb default video mode support
6 Currently all frame buffer device drivers have their own video mode databases,
9 - one routine to probe for video modes, which can be used by all frame buffer
11 - one generic video mode database with a fair amount of standard videomodes
13 - the possibility to supply your own mode database for graphics hardware that
14 needs non-standard modes, like amifb and Mac frame buffer drivers (which
18 consider that to be a video mode option. If no frame buffer device is specified
19 in a video= option, fbmem considers that to be a global video mode option.
21 Valid mode specifiers (mode_option argument)::
23 <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
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/openbmc/linux/drivers/gpu/drm/kmb/
H A Dkmb_crtc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2018-2020 Intel Corporation
31 struct drm_device *dev = crtc->dev; in kmb_crtc_enable_vblank()
47 struct drm_device *dev = crtc->dev; in kmb_crtc_disable_vblank()
71 struct drm_device *dev = crtc->dev; in kmb_crtc_set_mode()
72 struct drm_display_mode *m = &crtc->state->adjusted_mode; in kmb_crtc_set_mode() local
78 kmb_dsi_mode_set(kmb->kmb_dsi, m, kmb->sys_clk_mhz, old_state); in kmb_crtc_set_mode()
81 m->crtc_vsync_start - m->crtc_vdisplay, in kmb_crtc_set_mode()
82 m->crtc_vtotal - m->crtc_vsync_end, in kmb_crtc_set_mode()
83 m->crtc_vsync_end - m->crtc_vsync_start, in kmb_crtc_set_mode()
[all …]
/openbmc/linux/Documentation/arch/arm/nwfpe/
H A Dtodo.rst6 POW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - power
7 RPW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse power
8 POL{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - polar angle (arctan2)
10 LOG{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base 10
11 LGN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base e
12 EXP{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - exponent
13 SIN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - sine
14 COS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - cosine
15 TAN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - tangent
16 ASN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arcsine
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/openbmc/openbmc/meta-openembedded/meta-networking/recipes-extended/dlm/dlm/
H A D0001-make-Replace-cp-a-with-mode-preserving-options.patch3 Date: Tue, 3 Mar 2020 12:38:19 -0800
4 Subject: [PATCH] make: Replace cp -a with mode preserving options
8 Upstream-Status: Pending
9 Signed-off-by: Khem Raj <raj.khem@gmail.com>
10 ---
11 dlm_controld/Makefile | 4 ++--
12 libdlm/Makefile | 8 ++++----
13 2 files changed, 6 insertions(+), 6 deletions(-)
15 diff --git a/dlm_controld/Makefile b/dlm_controld/Makefile
17 --- a/dlm_controld/Makefile
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/openbmc/linux/tools/perf/pmu-events/arch/s390/cf_z14/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/openbmc/linux/Documentation/sound/cards/
H A Dserial-u16550.rst7 * 0 - Roland Soundcanvas support (default)
8 * 1 - Midiator MS-124T support (1)
9 * 2 - Midiator MS-124W S/A mode (2)
10 * 3 - MS-124W M/B mode support (3)
11 * 4 - Generic device with multiple input support (4)
13 For the Midiator MS-124W, you must set the physical M-S and A-B
14 switches on the Midiator to match the driver mode you select.
16 In Roland Soundcanvas mode, multiple ALSA raw MIDI substreams are supported
17 (midiCnD0-midiCnD15). Whenever you write to a different substream, the driver
28 /sbin/modprobe snd-serial-u16550 port=0x3f8 irq=4 speed=115200
[all …]
/openbmc/linux/drivers/iommu/intel/
H A Ddebugfs.c1 // SPDX-License-Identifier: GPL-2.0
114 static int iommu_regset_show(struct seq_file *m, void *unused) in iommu_regset_show() argument
124 if (!drhd->reg_base_addr) { in iommu_regset_show()
125 seq_puts(m, "IOMMU: Invalid base address\n"); in iommu_regset_show()
126 ret = -EINVAL; in iommu_regset_show()
130 seq_printf(m, "IOMMU: %s Register Base Address: %llx\n", in iommu_regset_show()
131 iommu->name, drhd->reg_base_addr); in iommu_regset_show()
132 seq_puts(m, "Name\t\t\tOffset\t\tContents\n"); in iommu_regset_show()
134 * Publish the contents of the 64-bit hardware registers in iommu_regset_show()
137 raw_spin_lock_irqsave(&iommu->register_lock, flag); in iommu_regset_show()
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/openbmc/linux/drivers/s390/char/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
13 def_tristate m
29 prompt "Support for 3215 line mode terminal"
32 Include support for IBM 3215 line-mode terminals.
36 prompt "Support for console on 3215 line mode terminal"
39 Include support for using an IBM 3215 line-mode terminal as a
47 prompt "Support for SCLP line mode terminal"
50 Include support for IBM SCLP line-mode terminals.
54 prompt "Support for console on SCLP line mode terminal"
57 Include support for using an IBM HWC line-mode terminal as the Linux
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/s390/cf_z15/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/s390/cf_z13/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
/openbmc/u-boot/board/freescale/mpc832xemds/
H A DREADME2 -----------------------------------------
4 1.0 There are five Dual-In-Line Packages(DIP) Switches on MPC832XE SYS board
11 and some of those signals may be high-bit-number-0 too. Heed
17 SW3 is switch 18 as silk-screened onto the board.
28 SW3[1-8]= 0000_1000 (core PLL setting, core enable)
29 SW4[1-8]= 0001_0010 (Flash boot on local bus, system PLL setting)
30 SW5[1-8]= 0010_0110 (Boot from high end)
31 SW6[1-8]= 0011_0100 (Flash boot on 16 bit local bus)
32 SW7[1-8]= 1000_0011 (QE PLL setting)
34 ENET3/4 MII mode settings:
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