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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dstarfive,jh7100-audclk.yaml4 $id: http://devicetree.org/schemas/clock/starfive,jh7100-audclk.yaml#
7 title: StarFive JH7100 Audio Clock Generator
14 const: starfive,jh7100-audclk
34 See <dt-bindings/clock/starfive-jh7100-audio.h> for valid indices.
47 #include <dt-bindings/clock/starfive-jh7100.h>
50 compatible = "starfive,jh7100-audclk";
H A Dstarfive,jh7100-clkgen.yaml4 $id: http://devicetree.org/schemas/clock/starfive,jh7100-clkgen.yaml#
7 title: StarFive JH7100 Clock Generator
15 const: starfive,jh7100-clkgen
37 See <dt-bindings/clock/starfive-jh7100.h> for valid indices.
51 compatible = "starfive,jh7100-clkgen";
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dstarfive,jh7100-wdt.yaml4 $id: http://devicetree.org/schemas/watchdog/starfive,jh7100-wdt.yaml#
7 title: StarFive Watchdog for JH7100 and JH7110 SoC
14 The JH7100 and JH7110 watchdog both are 32 bit counters. JH7100 watchdog
28 - starfive,jh7100-wdt
64 compatible = "starfive,jh7100-wdt";
/openbmc/linux/arch/riscv/boot/dts/starfive/
H A Djh7100.dtsi8 #include <dt-bindings/clock/starfive-jh7100.h>
9 #include <dt-bindings/reset/starfive-jh7100.h>
12 compatible = "starfive,jh7100";
144 compatible = "starfive,jh7100-clint", "sifive,clint0";
151 compatible = "starfive,jh7100-plic", "sifive,plic-1.0.0";
162 compatible = "starfive,jh7100-clkgen";
170 compatible = "starfive,jh7100-reset";
202 compatible = "starfive,jh7100-pinctrl";
216 compatible = "starfive,jh7100-uart", "snps,dw-apb-uart";
229 compatible = "starfive,jh7100-uart", "snps,dw-apb-uart";
[all …]
H A Djh7100-beaglev-starlight.dts8 #include "jh7100-common.dtsi"
12 compatible = "beagle,beaglev-starlight-jh7100-r0", "starfive,jh7100";
H A Djh7100-starfive-visionfive-v1.dts8 #include "jh7100-common.dtsi"
13 compatible = "starfive,visionfive-v1", "starfive,jh7100";
H A DMakefile8 dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
9 dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
H A Djh7100-common.dtsi8 #include "jh7100.dtsi"
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Dstarfive,jh7100-reset.yaml4 $id: http://devicetree.org/schemas/reset/starfive,jh7100-reset.yaml#
7 title: StarFive JH7100 SoC Reset Controller
15 - starfive,jh7100-reset
33 compatible = "starfive,jh7100-reset";
/openbmc/linux/Documentation/devicetree/bindings/hwmon/
H A Dstarfive,jh71x0-temp.yaml18 - starfive,jh7100-temp
57 #include <dt-bindings/clock/starfive-jh7100.h>
58 #include <dt-bindings/reset/starfive-jh7100.h>
61 compatible = "starfive,jh7100-temp";
/openbmc/linux/drivers/clk/starfive/
H A DKconfig7 bool "StarFive JH7100 clock support"
12 Say yes here to support the clock controller on the StarFive JH7100
16 tristate "StarFive JH7100 audio clock support"
21 Say Y or M here to support the audio clocks on the StarFive JH7100
H A Dclk-starfive-jh7100-audio.c3 * StarFive JH7100 Audio Clock Driver
16 #include <dt-bindings/clock/starfive-jh7100-audio.h>
153 { .compatible = "starfive,jh7100-audclk" },
161 .name = "clk-starfive-jh7100-audio",
168 MODULE_DESCRIPTION("StarFive JH7100 audio clock driver");
H A DMakefile4 obj-$(CONFIG_CLK_STARFIVE_JH7100) += clk-starfive-jh7100.o
5 obj-$(CONFIG_CLK_STARFIVE_JH7100_AUDIO) += clk-starfive-jh7100-audio.o
H A Dclk-starfive-jh7100.c3 * StarFive JH7100 Clock Generator Driver
16 #include <dt-bindings/clock/starfive-jh7100.h>
358 { .compatible = "starfive,jh7100-clkgen" },
364 .name = "clk-starfive-jh7100",
/openbmc/linux/drivers/reset/starfive/
H A Dreset-starfive-jh7100.c3 * Reset driver for the StarFive JH7100 SoC
13 #include <dt-bindings/reset/starfive-jh7100.h>
63 { .compatible = "starfive,jh7100-reset" },
69 .name = "jh7100-reset",
H A DKconfig7 bool "StarFive JH7100 Reset Driver"
12 This enables the reset controller driver for the StarFive JH7100 SoC.
H A DMakefile4 obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dstarfive,jh7100-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
7 title: StarFive JH7100 Pin Controller
10 Bindings for the JH7100 RISC-V SoC from StarFive Ltd.
53 const: starfive,jh7100-pinctrl
166 #include <dt-bindings/clock/starfive-jh7100.h>
167 #include <dt-bindings/reset/starfive-jh7100.h>
168 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
175 compatible = "starfive,jh7100-pinctrl";
/openbmc/linux/Documentation/devicetree/bindings/riscv/
H A Dstarfive.yaml23 - beagle,beaglev-starlight-jh7100-r0
25 - const: starfive,jh7100
/openbmc/linux/drivers/pinctrl/starfive/
H A DKconfig4 tristate "Pinctrl and GPIO driver for the StarFive JH7100 SoC"
15 Say yes here to support pin control on the StarFive JH7100 SoC.
H A DMakefile3 obj-$(CONFIG_PINCTRL_STARFIVE_JH7100) += pinctrl-starfive-jh7100.o
/openbmc/linux/Documentation/hwmon/
H A Dsfctemp.rst7 - StarFive JH7100
17 JH7100 and JH7110 RISC-V SoCs by StarFive Technology Co. Ltd.
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Dsifive,clint.yaml34 - starfive,jh7100-clint # StarFive JH7100
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dsnps-dw-apb-uart.yaml48 - starfive,jh7100-hsuart
49 - starfive,jh7100-uart
/openbmc/linux/Documentation/process/
H A Dmaintainer-soc.rst113 named $soc.dtsi, for example, jh7100.dtsi. Integration details, that will vary
115 jh7100-beaglev-starlight.dts. Often many boards are variations on a theme, and
116 frequently there are intermediate files, such as jh7100-common.dtsi, which sit

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