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Searched full:imx5_clk_uart1_per_gate (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dfsl-imx-uart.yaml126 <&clks IMX5_CLK_UART1_PER_GATE>;
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx5-clock.h41 #define IMX5_CLK_UART1_PER_GATE 29 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dimx5-clock.h37 #define IMX5_CLK_UART1_PER_GATE 29 macro
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx50.dtsi316 <&clks IMX5_CLK_UART1_PER_GATE>;
H A Dimx51.dtsi432 <&clks IMX5_CLK_UART1_PER_GATE>;
H A Dimx53.dtsi552 <&clks IMX5_CLK_UART1_PER_GATE>;
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx5.c189 clk[IMX5_CLK_UART1_PER_GATE] = imx_clk_gate2("uart1_per_gate", "uart_root", MXC_CCM_CCGR1, 8); in mx5_clocks_common_init()