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/openbmc/linux/Documentation/devicetree/bindings/leds/
H A Dqcom,pm8058-led.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/qcom,pm8058-led.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
17 hard-wired usecase.
19 Hardware-wise the different LEDs support slightly different output currents.
24 - $ref: common.yaml#
29 - qcom,pm8058-led
30 - qcom,pm8058-keypad-led
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/openbmc/linux/arch/arc/mm/
H A Dioremap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
41 * Cache semantics wise it is same as ioremap - "forced" uncached.
43 * ARC hardware uncached region, this one still goes thru the MMU as caller
/openbmc/linux/include/linux/soundwire/
H A Dsdw_intel.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
37 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
38 #define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
109 * ACE2.x definitions for SHIM registers - only accessible when the
118 /* Read-only capabilities */
120 #define SDW_SHIM2_LECAP_HDS BIT(0) /* unset -> Host mode */
125 #define SDW_SHIM2_PCMSCAP_ISS GENMASK(3, 0) /* Input-only streams */
126 #define SDW_SHIM2_PCMSCAP_OSS GENMASK(7, 4) /* Output-only streams */
129 /* Read-only PCM Stream Channel Count, y variable is stream */
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/openbmc/linux/arch/arc/kernel/
H A Dintc-compact.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-12 Synopsys, Inc. (www.synopsys.com)
17 * Early Hardware specific Interrupt setup
18 * -Platform independent, needed for each CPU (not foldable into init_IRQ)
19 * -Called very early (start_kernel -> setup_arch -> setup_processor)
22 * -Optionally, setup the High priority Interrupts as Level 2 IRQs
38 pr_info("Level-2 interrupts bitset %x\n", level_mask); in arc_init_IRQ()
41 * Disable all IRQ lines so faulty external hardware won't in arc_init_IRQ()
54 * ARC700 core includes a simple on-chip intc supporting
55 * -per IRQ enable/disable
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/openbmc/openbmc/meta-arm/documentation/
H A Dcontinuous-integration-and-kas.md1 # **CI for Yocto Project and meta-arm**
3 …t currently runs builds on the hardware reference platforms including genericarm64 and meta-arm ma…
8 # **CI for meta-arm**
9-arm is using the Gitlab CI infrastructure.  This is currently being done internal to Arm, but an …
11 …d coverage of the software and hardware supported in meta-arm. All platforms are required to add …
13 To this end, it would be wise to run kas locally to verify everything works prior to pushing to the…
18 $ pip3 install --user kas
21 See <https://kas.readthedocs.io/en/latest/userguide/getting-started.html> for information on the de…
27 $ cd ~/meta-arm/
31-arm to contain the checked out layers, build directory, and downloads.  You can change this by se…
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/openbmc/linux/drivers/media/radio/
H A Dradio-terratec.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * 1999-05-21 First preview release
11 * Notes on the hardware:
13 * - Philips OM5610 (http://www-us.semiconductors.philips.com/acrobat/datasheets/OM5610_2.pdf)
14 * - Philips SAA6588 (http://www-us.semiconductors.philips.com/acrobat/datasheets/SAA6588_1.pdf)
17 * Frequency control is done digitally -- ie out(port,encodefreq(95.8));
20 * Converted to the radio-isa framework by Hans Verkuil <hans.verkuil@cisco.com>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-ioctl.h>
33 #include "radio-isa.h"
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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
32 increased automatically with max(cs-gpios, hardware chip selects).
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/openbmc/linux/arch/arm/include/asm/
H A Dpgtable-2level.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/include/asm/pgtable-2level.h
5 * Copyright (C) 1995-2002 Russell King
13 * Hardware-wise, we have a two level page table structure, where the first
15 * is one 32-bit word. Most of the bits in the second level entry are used
16 * by hardware, and there aren't any "accessed" and "dirty" bits.
19 * be wrapped to fit a two level page table structure easily - using the PGD
23 * Therefore, we tweak the implementation slightly - we tell Linux that we
25 * hardware pointers to the second level.) The second level contains two
26 * hardware PTE tables arranged contiguously, preceded by Linux versions
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/openbmc/linux/Documentation/usb/
H A Dusb-serial.rst45 --------------------------------------
58 -----------------------------------------------
72 This goes against the current documentation for pilot-xfer and other
73 packages, but is the only way that it will work due to the hardware
77 (this is usually /dev/ttyUSB1 if you do not have any other usb-serial
99 Kroah-Hartman at greg@kroah.com
103 -------------------
115 significant advantage of using USB is speed - I can get 73 to 113
120 contains the necessary packages and a simple step-by-step howto.
129 iPAQ - disable autosync by going to the Start/Settings/Connections menu
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/openbmc/linux/include/drm/
H A Ddrm_mipi_dbi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
22 * struct mipi_dbi - MIPI DBI interface
64 * @tx_buf9: Buffer used for Option 1 9-bit conversion
75 * struct mipi_dbi_dev - MIPI DBI device
104 * @rotation: initial rotation in degrees Counter Clock Wise
198 * mipi_dbi_command - MIPI DCS command with optional parameter(s)
212 struct device *dev = &(dbi)->spi->dev; \
227 * DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS - Initializes struct drm_simple_display_pipe_funcs
228 * for MIPI-DBI devices
229 * @enable_: Enable-callback implementation
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H A Dgpu_scheduler.h28 #include <linux/dma-fence.h>
36 * DRM_SCHED_FENCE_DONT_PIPELINE - Prefent dependency pipelining
45 * DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT - A fence deadline hint has been set
81 * struct drm_sched_entity - A wrapper around a job queue (typically
84 * Entities will emit jobs in order to their corresponding hardware
244 * struct drm_sched_rq - queue of entities to be scheduled.
265 * struct drm_sched_fence - fences corresponding to the scheduling of a job.
294 * when scheduling the job on hardware. We signal the
316 * struct drm_sched_job - A job to be run by an entity.
379 return s_job && atomic_inc_return(&s_job->karma) > threshold; in drm_sched_invalidate_job()
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/openbmc/linux/Documentation/core-api/
H A Dunaligned-memory-access.rst32 which will compile to multiple-byte memory access instructions, namely when
59 - Some architectures are able to perform unaligned memory accesses
61 - Some architectures raise processor exceptions when unaligned accesses
64 - Some architectures raise processor exceptions when unaligned accesses
67 - Some architectures are not capable of unaligned memory access, but will
131 structure type. This GCC-specific attribute tells the compiler never to
141 non-packed case, so the packed attribute should only be used when avoiding
167 In the above function, when the hardware has efficient unaligned access
168 capability, there is no issue with this code. But when the hardware isn't
177 16-bit-aligned addresses. It is up to the caller to ensure this alignment or
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc13 ---------
14 The LS1043A integrated multicore processor combines four ARM Cortex-A53
20 - Four 64-bit ARM Cortex-A53 CPUs
21 - 1 MB unified L2 Cache
22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
24 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
26 - Packet parsing, classification, and distribution (FMan)
27 - Queue management for scheduling, packet sequencing, and congestion
29 - Hardware buffer management for buffer allocation and de-allocation (BMan)
30 - Cryptography acceleration (SEC)
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/openbmc/u-boot/doc/
H A DREADME.unaligned-memory-access.txt26 which will compile to multiple-byte memory access instructions, namely when
53 - Some architectures are able to perform unaligned memory accesses
55 - Some architectures raise processor exceptions when unaligned accesses
58 - Some architectures raise processor exceptions when unaligned accesses
61 - Some architectures are not capable of unaligned memory access, but will
125 structure type. This GCC-specific attribute tells the compiler never to
135 non-packed case, so the packed attribute should only be used when avoiding
161 In the above function, when the hardware has efficient unaligned access
162 capability, there is no issue with this code. But when the hardware isn't
171 16-bit-aligned addresses. It is up to the caller to ensure this alignment or
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/openbmc/linux/Documentation/driver-api/
H A Dlibata.rst12 transports for ATA and ATAPI devices, and SCSI<->ATA translation for ATA
16 internals, and a couple sample ATA low-level drivers.
22 is defined for every low-level libata
23 hardware driver, and it controls how the low-level driver interfaces
26 FIS-based drivers will hook into the system with ``->qc_prep()`` and
27 ``->qc_issue()`` high-level hooks. Hardware which behaves in a manner
28 similar to PCI IDE hardware may utilize several generic helpers,
33 ----------------------------------------------------------
35 Post-IDENTIFY device configuration
44 Typically used to apply device-specific fixups prior to issue of SET
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/openbmc/linux/Documentation/admin-guide/media/
H A Dcec.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Supported hardware in mainline
12 - Exynos4
13 - Exynos5
14 - STIH4xx HDMI CEC
15 - V4L2 adv7511 (same HW, but a different driver from the drm adv7511)
16 - stm32
17 - Allwinner A10 (sun4i)
18 - Raspberry Pi
19 - dw-hdmi (Synopsis IP)
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/openbmc/linux/Documentation/admin-guide/
H A Dreporting-issues.rst1 .. SPDX-License-Identifier: (GPL-2.0+ OR CC-BY-4.0)
36 ensure it's vanilla (IOW: not patched and not using add-on modules). Also make
44 to pin-point the culprit with a bisection; if you succeed, include its
45 commit-id and CC everyone in the sign-off-by chain.
51 Step-by-step guide how to report issues to the kernel maintainers
58 step-by-step approach. It still tries to be brief for readability and leaves
59 out a lot of details; those are described below the step-by-step guide in a
68 * Are you facing an issue with a Linux kernel a hardware or software vendor
89 kernel modules on-the-fly, which solutions like DKMS might be doing locally
169 --------------------------------------------------------------
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/openbmc/u-boot/drivers/mtd/nand/raw/
H A Domap_gpmc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
54 * omap_nand_hwcontrol - Set the address pointers corretly for the
62 int cs = info->cs; in omap_nand_hwcontrol()
70 this->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd; in omap_nand_hwcontrol()
73 this->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_adr; in omap_nand_hwcontrol()
76 this->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat; in omap_nand_hwcontrol()
81 writeb(cmd, this->IO_ADDR_W); in omap_nand_hwcontrol()
89 return gpmc_cfg->status & (1 << (8 + info->ws)); in omap_dev_ready()
93 * gen_true_ecc - This function will generate true ECC value, which
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/openbmc/linux/Documentation/networking/
H A Dscaling.rst1 .. SPDX-License-Identifier: GPL-2.0
13 multi-processor systems.
17 - RSS: Receive Side Scaling
18 - RPS: Receive Packet Steering
19 - RFS: Receive Flow Steering
20 - Accelerated Receive Flow Steering
21 - XPS: Transmit Packet Steering
28 (multi-queue). On reception, a NIC can send different packets to different
33 generally known as “Receive-side Scaling” (RSS). The goal of RSS and
35 Multi-queue distribution can also be used for traffic prioritization, but
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/openbmc/linux/drivers/interconnect/qcom/
H A Dbcm-voter.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <linux/interconnect-provider.h>
16 #include "bcm-voter.h"
17 #include "icc-rpmh.h"
23 * struct bcm_voter - Bus Clock Manager voter
27 * @commit_list: list containing bcms to be committed to hardware
47 return bcm_a->aux_data.vcd - bcm_b->aux_data.vcd; in cmp_vcd()
61 /* BCMs with enable_mask use one-hot-encoding for on/off signaling */
68 bcm->vote_x[bucket] = 0; in bcm_aggregate_mask()
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/openbmc/linux/drivers/block/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
28 <file:Documentation/admin-guide/blockdev/floppy.rst>.
41 special low-level hardware accesses to them (access and use
42 non-standard formats, for example), then enable this.
64 If you have a SWIM-3 (Super Woz Integrated Machine 3; from Apple)
95 tristate "SEGA Dreamcast GD-ROM drive"
100 "GD-ROM" by SEGA to signify it is capable of reading special disks
114 The User-Mode Linux port includes a driver called UBD which will let
124 host's disk; this may cause problems if, for example, the User-Mode
129 immediately) is configurable on a per-UBD basis by using a special
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/openbmc/linux/drivers/hwmon/
H A Demc2305.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Hardware monitoring driver for EMC2305 fan controller
62 * struct emc2305_cdev_data - device-specific cooling device state
70 * according to some system wise considerations, like absence of some replaceable units (PSU or
78 * From other side, fan speed is to be updated in hardware through 'pwm' only in case the
90 * struct emc2305_data - device-specific data
122 return data->pwm_num; in emc2305_get_max_channel()
127 struct emc2305_data *data = cdev->devdata; in emc2305_get_cdev_idx()
128 size_t len = strlen(cdev->type); in emc2305_get_cdev_idx()
132 return -EINVAL; in emc2305_get_cdev_idx()
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/openbmc/linux/Documentation/driver-api/mtd/
H A Dnand_ecc.rst2 NAND Error-correction Code
11 After that the speed was increased by 35-40%.
63 - cp0 is the parity that belongs to all bit0, bit2, bit4, bit6.
69 - cp2 is the parity over bit0, bit1, bit4 and bit5
70 - cp3 is the parity over bit2, bit3, bit6 and bit7.
71 - cp4 is the parity over bit0, bit1, bit2 and bit3.
72 - cp5 is the parity over bit4, bit5, bit6 and bit7.
78 - rp0 is the parity of all even bytes (0, 2, 4, 6, ... 252, 254)
79 - rp1 is the parity of all odd bytes (1, 3, 5, 7, ..., 253, 255)
80 - rp2 is the parity of all bytes 0, 1, 4, 5, 8, 9, ...
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/openbmc/linux/tools/memory-model/Documentation/
H A Daccess-marking.txt1 MARKING SHARED-MEMORY ACCESSES
6 not use read-modify-write atomic operations. It also describes how to
12 ACCESS-MARKING OPTIONS
15 The Linux kernel provides the following access-marking options:
17 1. Plain C-language accesses (unmarked), for example, "a = b;"
19 2. Data-race marking, for example, "data_race(a = b);"
33 Neither plain C-language accesses nor data_race() (#1 and #2 above) place
36 compiler's use of code-motion and common-subexpression optimizations.
40 C-language accesses. It is permissible to combine #2 and #3, for example,
45 C-language accesses, but marking all accesses involved in a given data
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/openbmc/linux/drivers/gpu/drm/
H A Ddrm_mipi_dbi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
62 * 1. 9-bit with the Data/Command signal as the ninth bit
64 * 3. 8-bit with the Data/Command signal as a separate D/CX pin
108 if (!dbi->read_commands) in mipi_dbi_command_is_read()
112 if (!dbi->read_commands[i]) in mipi_dbi_command_is_read()
114 if (cmd == dbi->read_commands[i]) in mipi_dbi_command_is_read()
122 * mipi_dbi_command_read - MIPI DCS read command
134 if (!dbi->read_commands) in mipi_dbi_command_read()
135 return -EACCES; in mipi_dbi_command_read()
138 return -EINVAL; in mipi_dbi_command_read()
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