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Searched full:hclk_i2s0 (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Drockchip-i2s.yaml133 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3188-cru-common.h112 #define HCLK_I2S0 454 macro
H A Drk3288-cru.h172 #define HCLK_I2S0 462 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3188-cru-common.h114 #define HCLK_I2S0 454 macro
H A Dpx30-cru.h138 #define HCLK_I2S0 262 macro
H A Drk3288-cru.h180 #define HCLK_I2S0 462 macro
H A Drockchip,rv1126-cru.h269 #define HCLK_I2S0 205 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3188.c638 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_cpu", 0, RK2928_CLKGATE_CON(7), 4, GFLAGS),
733 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_cpu", 0, RK2928_CLKGATE_CON(7), 2, GFLAGS),
H A Dclk-rv1126.c633 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_pdaudio", 0,
H A Dclk-rk3288.c677 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_cpu", 0, RK3288_CLKGATE_CON(10), 8, GFLAGS),
H A Dclk-px30.c840 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_bus_pre", 0, PX30_CLKGATE_CON(14), 2, GFLAGS),
H A Dclk-rk3399.c1022 GATE(HCLK_I2S0_8CH, "hclk_i2s0", "hclk_perilp1", 0, RK3399_CLKGATE_CON(34), 0, GFLAGS),
/openbmc/u-boot/arch/arm/dts/
H A Drk3288-veyron-mickey.dts190 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>;
H A Drk3188.dtsi83 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
H A Drk3288-veyron.dtsi532 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>;
H A Drk3288.dtsi656 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-firefly-reload.dts222 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
H A Drk3188.dtsi171 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
H A Drk3066a.dtsi161 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
H A Drk3288.dtsi965 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30.dtsi393 clocks = <&cru SCLK_I2S0_TX>, <&cru SCLK_I2S0_RX>, <&cru HCLK_I2S0>;