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/openbmc/linux/drivers/perf/
H A Darm_pmu_acpi.c24 struct acpi_madt_generic_interrupt *gicc; in arm_pmu_acpi_register_irq() local
27 gicc = acpi_cpu_get_madt_gicc(cpu); in arm_pmu_acpi_register_irq()
29 gsi = gicc->performance_interrupt; in arm_pmu_acpi_register_irq()
41 if (gicc->flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) in arm_pmu_acpi_register_irq()
47 * Helpfully, the MADT GICC doesn't have a polarity flag for the in arm_pmu_acpi_register_irq()
62 struct acpi_madt_generic_interrupt *gicc; in arm_pmu_acpi_unregister_irq() local
65 gicc = acpi_cpu_get_madt_gicc(cpu); in arm_pmu_acpi_unregister_irq()
67 gsi = gicc->performance_interrupt; in arm_pmu_acpi_unregister_irq()
90 * Sanity check all the GICC tables for the same interrupt in arm_acpi_register_pmu_device()
94 struct acpi_madt_generic_interrupt *gicc; in arm_acpi_register_pmu_device() local
[all …]
/openbmc/linux/arch/arm64/include/asm/
H A Dacpi.h24 /* Macros for consistency checks of the GICC subtable of MADT */
27 * MADT GICC minimum length refers to the MADT GICC structure table length as
31 * struct acpi_madt_generic_interrupt to represent the MADT GICC structure
33 * is therefore used to delimit the MADT GICC structure minimum length
107 * obtained from GICC with 0 and not print some error message as well.
108 * Since MADT must provide at least one GICC structure for GIC
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic-v3.yaml77 - GIC CPU interface (GICC)
81 GICC, GICH and GICV are optional, but must be described if the CPUs
251 <0x2c000000 0x2000>, // GICC
280 <0x2c040000 0x2000>, // GICC
/openbmc/linux/drivers/irqchip/
H A Dirq-gic-v3.c2231 gicv_idx += 3; /* Also skip GICD, GICC, GICH */ in gic_of_setup_kvm_info()
2384 struct acpi_madt_generic_interrupt *gicc = in gic_acpi_parse_madt_gicc() local
2390 /* GICC entry which has !ACPI_MADT_ENABLED is not unusable so skip */ in gic_acpi_parse_madt_gicc()
2391 if (!(gicc->flags & ACPI_MADT_ENABLED)) in gic_acpi_parse_madt_gicc()
2394 redist_base = ioremap(gicc->gicr_base_address, size); in gic_acpi_parse_madt_gicc()
2397 gic_request_region(gicc->gicr_base_address, size, "GICR"); in gic_acpi_parse_madt_gicc()
2399 gic_acpi_register_redist(gicc->gicr_base_address, redist_base); in gic_acpi_parse_madt_gicc()
2434 struct acpi_madt_generic_interrupt *gicc = in gic_acpi_match_gicc() local
2438 * If GICC is enabled and has valid gicr base address, then it means in gic_acpi_match_gicc()
2439 * GICR base is presented via GICC in gic_acpi_match_gicc()
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/openbmc/linux/drivers/acpi/
H A Dprocessor_core.c90 struct acpi_madt_generic_interrupt *gicc = in map_gicc_mpidr() local
93 if (!(gicc->flags & ACPI_MADT_ENABLED)) in map_gicc_mpidr()
101 if (device_declaration && (gicc->uid == acpi_id)) { in map_gicc_mpidr()
102 *mpidr = gicc->arm_mpidr; in map_gicc_mpidr()
/openbmc/linux/drivers/cpufreq/
H A Dcppc_cpufreq.c519 struct acpi_madt_generic_interrupt *gicc; in populate_efficiency_class() local
524 gicc = acpi_cpu_get_madt_gicc(cpu); in populate_efficiency_class()
525 class = gicc->efficiency_class; in populate_efficiency_class()
542 gicc = acpi_cpu_get_madt_gicc(cpu); in populate_efficiency_class()
543 if (gicc->efficiency_class == class) in populate_efficiency_class()
/openbmc/qemu/include/hw/acpi/
H A Dacpi_dev_interface.h40 * 0 - Local APIC, 9 - Local x2APIC, 0xB - GICC
/openbmc/qemu/include/hw/intc/
H A Darm_gic.h53 * - CPU interface for the accessing core (GICC*)
/openbmc/linux/arch/arm64/boot/dts/broadcom/bcmbca/
H A Dbcm6856.dtsi88 <0x2000 0x2000>, /* GICC */
H A Dbcm6858.dtsi106 <0x2000 0x2000>, /* GICC */
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap810-ap0.dtsi53 <0x00c0000 0x2000>, /* GICC */
/openbmc/qemu/include/hw/arm/
H A Dxlnx-zynqmp.h72 * ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k offsets
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62p-main.dtsi25 <0x01 0x00000000 0x00 0x2000>, /* GICC */
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-ls1012a.dtsi24 <0x0 0x1402000 0 0x2000>, /* GICC */
H A Dhi6220.dtsi116 <0x0 0xf6802000 0 0x2000>, /* GICC */
H A Dfsl-ls1043a.dtsi28 <0x0 0x1402000 0 0x2000>, /* GICC */
H A Dfsl-ls1046a.dtsi28 <0x0 0x1420000 0 0x10000>, /* GICC */
/openbmc/u-boot/arch/arm/cpu/armv7/
H A Dnonsec_virt.S204 mov r0, r3 @ return GICC address
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dipq5018.dtsi161 <0x0b002000 0x2000>, /* GICC */
H A Dipq5332.dtsi296 <0x0b002000 0x1000>, /* GICC */
/openbmc/linux/arch/arm64/boot/dts/amazon/
H A Dalpine-v2.dtsi120 <0x0 0xf0100000 0x0 0x2000>, /* GICC */
/openbmc/linux/arch/arm64/boot/dts/nuvoton/
H A Dma35d1.dtsi56 <0x0 0x50802000 0 0x2000>, /* GICC */
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip05.dtsi248 <0x0 0xfe000000 0 0x10000>, /* GICC */
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Dfvp-base-revc.dts197 <0x0 0x2c000000 0 0x2000>, // GICC
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qm.dtsi241 <0x0 0x52000000 0 0x2000>, /* GICC */

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