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/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
83 FN(reg, f4), v4)
85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
91 FN(reg, f4), v4,\
94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
100 FN(reg, f4), v4,\
104 #define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
110 FN(reg, f4), v4,\
115 #define REG_SET_8(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
121 FN(reg, f4), v4,\
[all …]
/openbmc/qemu/target/s390x/tcg/
H A Dinsn-format.h.inc9 F4(RIE_b, R(1, 8), R(2,12), M(3,32), I(4,16,16))
10 F4(RIE_c, R(1, 8), I(2,32, 8), M(3,12), I(4,16,16))
18 F4(RIS, R(1, 8), I(2,32, 8), M(3,12), BD(4,16,20))
25 F4(RRF_a, R(1,24), R(2,28), R(3,16), M(4,20))
26 F4(RRF_b, R(1,24), R(2,28), R(3,16), M(4,20))
27 F4(RRF_c, R(1,24), R(2,28), M(3,16), M(4,20))
28 F4(RRF_d, R(1,24), R(2,28), M(3,16), M(4,20))
29 F4(RRF_e, R(1,24), R(2,28), M(3,16), M(4,20))
30 F4(RRS, R(1, 8), R(2,12), M(3,32), BD(4,16,20))
48 F4(SS_b, L(1, 8, 4), BD(1,16,20), L(2,12,4), BD(2,32,36))
[all …]
/openbmc/linux/Documentation/arch/arm/nwfpe/
H A Dnotes.rst10 registers f4-f7 to be preserved over a function call. The compiler quite
11 often uses an stfe instruction to save f4 on the stack upon entry to a
14 I was looking at some code, that calculated a double result, stored it in f4
16 f4 had been converted to an extended value in the emulator.
18 This is a side effect of the stfe instruction. The double in f4 had to be
21 result from the function call and f4 were used in a multiplication. If the
31 moved to f4 to preserve it over the log(y) call. The division will be done
32 in extended precision, due to the stfe instruction used to save f4 in log(y).
/openbmc/linux/arch/x86/crypto/
H A Dblowfish-x86_64-asm_64.S172 #define F4(x) \ macro
201 F4(RX0); \
202 F4(RX1); \
203 F4(RX2); \
204 F4(RX3); \
206 F4(RX0); \
207 F4(RX1); \
208 F4(RX2); \
209 F4(RX3);
222 F4(RX0); \
[all …]
H A Dsha1_ssse3_asm.S168 RR F4,A,B,C,D,E,60
169 RR F4,D,E,A,B,C,62
170 RR F4,B,C,D,E,A,64
171 RR F4,E,A,B,C,D,66
172 RR F4,C,D,E,A,B,68
174 RR F4,A,B,C,D,E,70
175 RR F4,D,E,A,B,C,72
176 RR F4,B,C,D,E,A,74
177 RR F4,E,A,B,C,D,76
178 RR F4,C,D,E,A,B,78
[all …]
/openbmc/linux/arch/sparc/lib/
H A DU1memcpy.S70 #define FREG_FROB(f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
73 faligndata %f3, %f4, %f52; \
74 faligndata %f4, %f5, %f54; \
296 EX_LD_FP(LOAD(ldd, %o1, %f4), U1_g2_0_fp)
300 faligndata %f4, %f6, %f0
305 EX_LD_FP(LOAD(ldd, %o1 + 0x8, %f4), U1_g2_0_fp)
308 faligndata %f6, %f4, %f0
357 1: FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16)
371 FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16)
373 3: FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16)
[all …]
H A DNG2memcpy.S89 faligndata %x2, %x3, %f4; \
104 fsrc2 %x2, %f4;
108 fsrc2 %x2, %f4; \
113 fsrc2 %x2, %f4; \
119 fsrc2 %x2, %f4; \
126 fsrc2 %x2, %f4; \
134 fsrc2 %x2, %f4; \
353 FREG_FROB(f0, f2, f4, f6, f8, f10, f12, f14, f16)
364 FREG_LOAD_7(%g2, f0, f2, f4, f6, f8, f10, f12)
367 FREG_FROB(f0, f2, f4, f6, f8, f10, f12, f16, f18)
[all …]
H A Dcopy_page.S108 ldd [%o1 + 0x010], %f4
114 fsrc2 %f4, %f20
124 ldd [%o1 + 0x050], %f4
132 fsrc2 %f4, %f20
147 ldd [%o1 + 0x050], %f4
155 fsrc2 %f4, %f20
184 1: TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
205 TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
H A DU3memcpy.S227 EX_LD_FP(LOAD(ldd, %o1, %f4), U3_retl_o2_plus_g2)
231 faligndata %f4, %f6, %f0
236 EX_LD_FP(LOAD(ldd, %o1 + 0x8, %f4), U3_retl_o2_plus_g2)
239 faligndata %f6, %f4, %f2
254 EX_LD_FP(LOAD(ldd, %o1 + 0x010, %f4), U3_retl_o2)
258 faligndata %f2, %f4, %f18
260 faligndata %f4, %f6, %f20
281 EX_LD_FP(LOAD(ldd, %o1 + 0x010, %f4), U3_retl_o2_plus_o3_sll_6_plus_0x80)
289 faligndata %f2, %f4, %f18
291 faligndata %f4, %f6, %f20
[all …]
/openbmc/linux/arch/sparc/crypto/
H A Daes_asm.S232 ld [%o0 + 0x10], %f4
237 std %f4, [%o1 + 0x00]
298 ld [%o0 + 0x10], %f4
301 std %f4, [%o1 + 0x00]
376 std %f4, [%o1 + 0x00]
405 ld [%o1 + 0x00], %f4
431 fxor %f8, %f4, %f4
434 st %f4, [%o2 + 0x00]
446 ld [%o1 + 0x00], %f4
454 fxor %f8, %f4, %f4
[all …]
H A Ddes_asm.S31 std %f4, [%o1 + 0x10]
56 ldd [%o0 + 0x10], %f4
91 ldd [%o0 + 0x10], %f4
189 ldd [%o0 + 0x10], %f4
208 ldd [%o0 + 0x90], %f4
234 ldd [%o0 + 0x110], %f4
277 ldd [%o0 + 0x10], %f4
332 ldd [%o0 + 0x140], %f4; \
361 ldd [%o0 + 0x10], %f4; \
H A Dcamellia_asm.S138 ldd [%o1 + 0x20], %f4 ! k[ 8, 9]
140 fxor %f0, %f4, %f0
214 ldd [%o1 + 0x28], %f4
220 std %f4, [%o3 + 0x10]
250 ldd [%o0 + 0x00], %f4
254 fxor %f4, %f0, %f0
315 ldd [%o0 + 0x00], %f4
350 fxor %f4, %f0, %f0
372 fxor %f4, %f0, %f0
420 fxor %f4, %f0, %f0
[all …]
/openbmc/linux/crypto/
H A Drmd160.c40 #define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */ macro
122 ROUND(cc, dd, ee, aa, bb, F4, K4, in[1], 11); in rmd160_transform()
123 ROUND(bb, cc, dd, ee, aa, F4, K4, in[9], 12); in rmd160_transform()
124 ROUND(aa, bb, cc, dd, ee, F4, K4, in[11], 14); in rmd160_transform()
125 ROUND(ee, aa, bb, cc, dd, F4, K4, in[10], 15); in rmd160_transform()
126 ROUND(dd, ee, aa, bb, cc, F4, K4, in[0], 14); in rmd160_transform()
127 ROUND(cc, dd, ee, aa, bb, F4, K4, in[8], 15); in rmd160_transform()
128 ROUND(bb, cc, dd, ee, aa, F4, K4, in[12], 9); in rmd160_transform()
129 ROUND(aa, bb, cc, dd, ee, F4, K4, in[4], 8); in rmd160_transform()
130 ROUND(ee, aa, bb, cc, dd, F4, K4, in[13], 9); in rmd160_transform()
[all …]
H A Dmd5.c35 #define F4(x, y, z) (y ^ (x | ~z)) macro
100 MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6); in md5_transform()
101 MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10); in md5_transform()
102 MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15); in md5_transform()
103 MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21); in md5_transform()
104 MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6); in md5_transform()
105 MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10); in md5_transform()
106 MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15); in md5_transform()
107 MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21); in md5_transform()
108 MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6); in md5_transform()
[all …]
/openbmc/linux/arch/arm/crypto/
H A Dsha1-armv7-neon.S532 _R( _a, _b, _c, _d, _e, F4, 60,
535 _R( _e, _a, _b, _c, _d, F4, 61,
538 _R( _d, _e, _a, _b, _c, F4, 62,
541 _R( _c, _d, _e, _a, _b, F4, 63,
550 _R( _b, _c, _d, _e, _a, F4, 64,
552 _R( _a, _b, _c, _d, _e, F4, 65,
554 _R( _e, _a, _b, _c, _d, F4, 66,
556 _R( _d, _e, _a, _b, _c, F4, 67,
559 _R( _c, _d, _e, _a, _b, F4, 68,
561 _R( _b, _c, _d, _e, _a, F4, 69,
[all …]
/openbmc/u-boot/lib/
H A Dmd5.c171 #define F4(x, y, z) (y ^ (x | ~z)) macro
243 MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6); in MD5Transform()
244 MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10); in MD5Transform()
245 MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15); in MD5Transform()
246 MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21); in MD5Transform()
247 MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6); in MD5Transform()
248 MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10); in MD5Transform()
249 MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15); in MD5Transform()
250 MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21); in MD5Transform()
251 MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6); in MD5Transform()
[all …]
/openbmc/linux/drivers/hwmon/
H A Dfam15h_power.c77 struct pci_dev *f4 = data->pdev; in power1_input_show() local
79 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), in power1_input_show()
96 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), in power1_input_show()
329 static bool should_load_on_this_node(struct pci_dev *f4) in should_load_on_this_node() argument
333 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3), in should_load_on_this_node()
386 static int fam15h_power_init_data(struct pci_dev *f4, in fam15h_power_init_data() argument
393 pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val); in fam15h_power_init_data()
397 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), in fam15h_power_init_data()
405 dev_warn(&f4->dev, in fam15h_power_init_data()
412 ret = fam15h_power_init_attrs(f4, data); in fam15h_power_init_data()
/openbmc/openbmc/meta-facebook/meta-ventura/recipes-phosphor/gpio/phosphor-gpio-monitor/
H A Dfrontled14 LEDstate=$(echo "$MESSAGE" | cut -d ' ' -f4)
23 LEDstate=$(echo "$MESSAGE" | cut -d ' ' -f4)
33 traynum=$(echo "$MESSAGE" | cut -d '-' -f4 | cut -d ' ' -f1)
34 LEDstate=$(echo "$MESSAGE" | cut -d ' ' -f4)
42 traynum=$(echo "$MESSAGE" | cut -d '-' -f4 | cut -d ' ' -f1)
43 LEDstate=$(echo "$MESSAGE" | cut -d ' ' -f4)
/openbmc/linux/include/linux/
H A Dindirect_call_wrapper.h31 #define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) \ argument
33 likely(f == f4) ? f4(__VA_ARGS__) : \
45 #define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) f(__VA_ARGS__) argument
/openbmc/linux/tools/testing/selftests/hid/tests/
H A Dtest_apple_keyboard.py170 r = uhdev.event(["F4"])
194 r.extend(uhdev.event(["F4"]))
226 r.extend(uhdev.event(["F4"]))
256 r = uhdev.event(["F4"])
289 r.extend(uhdev.event(["F4"]))
290 r.extend(uhdev.event(["F4", "F6"]))
338 # press F4
339 r = uhdev.event(["F4"])
364 # keep F4 and press F6
365 r = uhdev.event(["F4", "F6"])
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h76 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
81 FN(reg, f4), v4)
103 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
108 FN(reg, f4), v4)
/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_lsc.S44 wfr f4, a3
47 ssi f4, a2, 4
185 movdf f4, 0x40a00000, 0
188 sdi f4, a2, 8
/openbmc/linux/Documentation/admin-guide/media/
H A Ddvb-usb-umt-010-cardlist.rst16 - 15f4:0001, 15f4:0015
/openbmc/linux/drivers/dma-buf/
H A Dst-dma-fence-unwrap.c309 struct dma_fence *fence, *f1, *f2, *f3, *f4, *f5; in unwrap_merge_complex() local
330 f4 = dma_fence_unwrap_merge(f2, f1); in unwrap_merge_complex()
331 if (!f4) in unwrap_merge_complex()
335 f5 = dma_fence_unwrap_merge(f3, f4, dma_fence_get_stub()); in unwrap_merge_complex()
360 dma_fence_put(f4); in unwrap_merge_complex()
/openbmc/linux/drivers/tty/serial/
H A Dstm32-usart.h41 /* USART_SR (F4) / USART_ISR (F7) */
44 #define USART_SR_NE BIT(2) /* F7 (NF for F4) */
77 #define USART_CR1_RWU BIT(1) /* F4 */
89 #define USART_CR1_M0 BIT(12) /* F7 (CR1_M for F4) */
104 #define USART_CR2_ADD_MASK GENMASK(3, 0) /* F4 */

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