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/openbmc/linux/drivers/vdpa/vdpa_user/
H A Diova_domain.c20 static int vduse_iotlb_add_range(struct vduse_iova_domain *domain, in vduse_iotlb_add_range() argument
35 ret = vhost_iotlb_add_range_ctx(domain->iotlb, start, last, in vduse_iotlb_add_range()
45 static void vduse_iotlb_del_range(struct vduse_iova_domain *domain, in vduse_iotlb_del_range() argument
51 while ((map = vhost_iotlb_itree_first(domain->iotlb, start, last))) { in vduse_iotlb_del_range()
55 vhost_iotlb_map_free(domain->iotlb, map); in vduse_iotlb_del_range()
59 int vduse_domain_set_map(struct vduse_iova_domain *domain, in vduse_domain_set_map() argument
67 spin_lock(&domain->iotlb_lock); in vduse_domain_set_map()
68 vduse_iotlb_del_range(domain, start, last); in vduse_domain_set_map()
73 ret = vduse_iotlb_add_range(domain, map->start, map->last, in vduse_domain_set_map()
80 spin_unlock(&domain->iotlb_lock); in vduse_domain_set_map()
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/openbmc/linux/kernel/irq/
H A Dirqdomain.c28 static int irq_domain_alloc_irqs_locked(struct irq_domain *domain, int irq_base,
31 static void irq_domain_check_hierarchy(struct irq_domain *domain);
62 * identifying an irq domain
65 * @name: Optional user provided domain name
74 * domain struct.
137 struct irq_domain *domain; in __irq_domain_create() local
146 domain = kzalloc_node(struct_size(domain, revmap, size), in __irq_domain_create()
148 if (!domain) in __irq_domain_create()
157 domain->name = kstrdup(fwid->name, GFP_KERNEL); in __irq_domain_create()
158 if (!domain->name) { in __irq_domain_create()
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H A Dmsi.c24 * @domid: ID of the domain on which management operations should be done
39 /* The maximum domain size */
127 * @domid: The id of the interrupt domain to which the desriptor is added
168 (dev->msi.domain && in msi_ctrl_valid()
169 !dev->msi.data->__domains[ctrl->domid].domain))) in msi_ctrl_valid()
205 * @domid: Id of the domain to operate on
314 * If @dev::msi::domain is set and is a global MSI domain, copy the in msi_setup_device_data()
315 * pointer into the domain array so all code can operate on domain in msi_setup_device_data()
319 if (dev->msi.domain && !irq_domain_is_msi_parent(dev->msi.domain)) in msi_setup_device_data()
320 md->__domains[MSI_DEFAULT_DOMAIN].domain = dev->msi.domain; in msi_setup_device_data()
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/openbmc/linux/drivers/scsi/elx/libefc/
H A Defc_domain.c8 * domain_sm Domain State Machine: States
17 struct efc_domain *domain = NULL; in efc_domain_cb() local
22 domain = data; in efc_domain_cb()
24 /* Accept domain callback events from the user driver */ in efc_domain_cb()
34 efc_log_debug(efc, "Domain found: wwn %016llX\n", fcf_wwn); in efc_domain_cb()
36 /* lookup domain, or allocate a new one */ in efc_domain_cb()
37 domain = efc->domain; in efc_domain_cb()
38 if (!domain) { in efc_domain_cb()
39 domain = efc_domain_alloc(efc, fcf_wwn); in efc_domain_cb()
40 if (!domain) { in efc_domain_cb()
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H A Defc_cmds.c132 nport->indicator, nport->domain->indicator); in efc_nport_alloc_init_vpi()
207 struct efc_domain *domain, u8 *wwpn) in efc_cmd_nport_alloc() argument
227 if (domain) { in efc_cmd_nport_alloc()
237 /* domain NULL and wwpn non-NULL */ in efc_cmd_nport_alloc()
278 nport->domain->indicator, false); in efc_cmd_nport_attach()
317 efc_domain_get_mbox_status(struct efc_domain *domain, u8 *mqe, int status) in efc_domain_get_mbox_status() argument
319 struct efc *efc = domain->efc; in efc_domain_get_mbox_status()
325 domain->indicator, status, in efc_domain_get_mbox_status()
334 efc_domain_free_resources(struct efc_domain *domain, int evt, void *data) in efc_domain_free_resources() argument
336 struct efc *efc = domain->efc; in efc_domain_free_resources()
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/openbmc/linux/drivers/pmdomain/imx/
H A Dimx93-pd.c38 struct imx93_power_domain *domain = to_imx93_pd(genpd); in imx93_pd_on() local
39 void __iomem *addr = domain->addr; in imx93_pd_on()
43 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); in imx93_pd_on()
45 dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name); in imx93_pd_on()
56 dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val); in imx93_pd_on()
65 struct imx93_power_domain *domain = to_imx93_pd(genpd); in imx93_pd_off() local
66 void __iomem *addr = domain->addr; in imx93_pd_off()
78 dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val); in imx93_pd_off()
82 clk_bulk_disable_unprepare(domain->num_clks, domain->clks); in imx93_pd_off()
89 struct imx93_power_domain *domain = platform_get_drvdata(pdev); in imx93_pd_remove() local
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H A Dgpcv2.c318 struct imx_pgc_domain *domain = to_imx_pgc_domain(genpd); in imx_pgc_power_up() local
322 ret = pm_runtime_get_sync(domain->dev); in imx_pgc_power_up()
324 pm_runtime_put_noidle(domain->dev); in imx_pgc_power_up()
328 if (!IS_ERR(domain->regulator)) { in imx_pgc_power_up()
329 ret = regulator_enable(domain->regulator); in imx_pgc_power_up()
331 dev_err(domain->dev, in imx_pgc_power_up()
338 reset_control_assert(domain->reset); in imx_pgc_power_up()
340 /* Enable reset clocks for all devices in the domain */ in imx_pgc_power_up()
341 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); in imx_pgc_power_up()
343 dev_err(domain->dev, "failed to enable reset clocks\n"); in imx_pgc_power_up()
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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,imx8-acm.yaml64 - description: power domain of IMX_SC_R_AUDIO_CLK_0
65 - description: power domain of IMX_SC_R_AUDIO_CLK_1
66 - description: power domain of IMX_SC_R_MCLK_OUT_0
67 - description: power domain of IMX_SC_R_MCLK_OUT_1
68 - description: power domain of IMX_SC_R_AUDIO_PLL_0
69 - description: power domain of IMX_SC_R_AUDIO_PLL_1
70 - description: power domain of IMX_SC_R_ASRC_0
71 - description: power domain of IMX_SC_R_ASRC_1
72 - description: power domain of IMX_SC_R_ESAI_0
73 - description: power domain of IMX_SC_R_SAI_0
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/openbmc/linux/Documentation/devicetree/bindings/power/
H A Dpower-domain.yaml4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
19 This device tree binding can be used to bind PM domain consumer devices with
20 their PM domains provided by PM domain providers. A PM domain provider can be
23 phandle arguments (so called PM domain specifiers) of length specified by the
24 \#power-domain-cells property in the PM domain provider node.
28 pattern: "^(power-controller|power-domain)([@-].*)?$"
30 domain-idle-states:
36 power-domain provider. The idle state definitions are compatible with the
37 domain-idle-state bindings, specified in ./domain-idle-state.yaml.
39 Note that, the domain-idle-state property reflects the idle states of this
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H A Dmediatek,power-controller.yaml17 IP cores belonging to a power domain should contain a 'power-domains'
18 property that is a phandle for SCPSYS node representing the domain.
35 '#power-domain-cells':
45 "^power-domain@[0-9a-f]+$":
46 $ref: "#/$defs/power-domain-node"
48 "^power-domain@[0-9a-f]+$":
49 $ref: "#/$defs/power-domain-node"
51 "^power-domain@[0-9a-f]+$":
52 $ref: "#/$defs/power-domain-node"
54 "^power-domain@[0-9a-f]+$":
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/openbmc/u-boot/include/
H A Dpower-domain.h10 * A power domain is a portion of an SoC or chip that is powered by a
12 * power domain, and can turn the power source on or off. This is typically
17 * A driver that implements UCLASS_POWER_DOMAIN is a power domain controller or
20 * power-domain-uclass.h describes the interface which power domain controllers
23 * Depending on the power domain controller hardware, changing the state of a
24 * power domain may require performing related operations on other resources.
26 * whenever the power domain is powered on, or during the time when the power
27 * domain is transitioning state. These details are implementation-specific
32 * Power domain consumers/clients are the drivers for HW modules within the
33 * power domain. This header file describes the API used by those drivers.
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/openbmc/u-boot/arch/arm/dts/
H A Dkeystone-k2hk-clocks.dtsi62 reg-names = "control", "domain";
63 domain-id = <0>;
72 reg-names = "control", "domain";
73 domain-id = <4>;
82 reg-names = "control", "domain";
83 domain-id = <5>;
92 reg-names = "control", "domain";
93 domain-id = <9>;
102 reg-names = "control", "domain";
103 domain-id = <10>;
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H A Dkeystone-k2l-clocks.dtsi52 reg-names = "control", "domain";
54 domain-id = <0>;
63 reg-names = "control", "domain";
64 domain-id = <4>;
73 reg-names = "control", "domain";
74 domain-id = <9>;
83 reg-names = "control", "domain";
84 domain-id = <10>;
93 reg-names = "control", "domain";
94 domain-id = <11>;
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/openbmc/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2hk-clocks.dtsi59 reg-names = "control", "domain";
60 domain-id = <0>;
69 reg-names = "control", "domain";
70 domain-id = <4>;
79 reg-names = "control", "domain";
80 domain-id = <5>;
89 reg-names = "control", "domain";
90 domain-id = <9>;
99 reg-names = "control", "domain";
100 domain-id = <10>;
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H A Dkeystone-k2l-clocks.dtsi49 reg-names = "control", "domain";
51 domain-id = <0>;
60 reg-names = "control", "domain";
61 domain-id = <4>;
70 reg-names = "control", "domain";
71 domain-id = <9>;
80 reg-names = "control", "domain";
81 domain-id = <10>;
90 reg-names = "control", "domain";
91 domain-id = <11>;
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/openbmc/linux/include/linux/
H A Dirqdomain.h14 * Interrupt controller "domain" data structure. This could be defined as a
15 * irq domain controller. That is, it handles the mapping between hardware
16 * and virtual interrupt numbers for a given interrupt domain. The domain
18 * (though a domain can cover more than one PIC if they have a flat number
19 * model). It's the domain callbacks that are responsible for setting the
23 * identify the domain. In some cases, and in order to preserve source
122 * @name: Name of interrupt domain
128 * @mutex: Domain lock, hierarchical domains use root domain's lock
129 * @root: Pointer to root domain, or containing structure if non-hierarchical
141 * purposes related to the irq domain.
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/openbmc/linux/drivers/pmdomain/xilinx/
H A Dzynqmp-pm-domains.c3 * ZynqMP Generic PM domain support
28 * @gpd: Generic power domain
29 * @node_id: PM node ID corresponding to device inside PM domain
30 * @requested: The PM node mapped to the PM domain has been requested
65 * zynqmp_gpd_power_on() - Power on PM domain
66 * @domain: Generic PM domain
68 * This function is called before devices inside a PM domain are resumed, to
69 * power on PM domain.
73 static int zynqmp_gpd_power_on(struct generic_pm_domain *domain) in zynqmp_gpd_power_on() argument
75 struct zynqmp_pm_domain *pd = to_zynqmp_pm_domain(domain); in zynqmp_gpd_power_on()
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/openbmc/linux/drivers/pci/msi/
H A Dirqdomain.c13 struct irq_domain *domain; in pci_msi_setup_msi_irqs() local
15 domain = dev_get_msi_domain(&dev->dev); in pci_msi_setup_msi_irqs()
16 if (domain && irq_domain_is_hierarchy(domain)) in pci_msi_setup_msi_irqs()
24 struct irq_domain *domain; in pci_msi_teardown_msi_irqs() local
26 domain = dev_get_msi_domain(&dev->dev); in pci_msi_teardown_msi_irqs()
27 if (domain && irq_domain_is_hierarchy(domain)) { in pci_msi_teardown_msi_irqs()
104 * pci_msi_create_irq_domain - Create a MSI interrupt domain
106 * @info: MSI domain info
107 * @parent: Parent irq domain
109 * Updates the domain and chip ops and creates a MSI interrupt domain.
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/openbmc/linux/drivers/base/
H A Dplatform-msi.c52 static int platform_msi_init(struct irq_domain *domain, in platform_msi_init() argument
57 return irq_domain_set_hwirq_and_chip(domain, virq, hwirq, in platform_msi_init()
111 * platform_msi_create_irq_domain - Create a platform MSI interrupt domain
113 * @info: MSI domain info
114 * @parent: Parent irq domain
116 * Updates the domain and chip ops and creates a platform MSI
117 * interrupt domain.
120 * A domain pointer or NULL in case of failure.
126 struct irq_domain *domain; in platform_msi_create_irq_domain() local
135 domain = msi_create_irq_domain(fwnode, info, parent); in platform_msi_create_irq_domain()
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/openbmc/linux/Documentation/scheduler/
H A Dsched-stats.rst13 per-domain. Note that domains (and their associated information) will only
16 In version 14 of schedstat, there is at least one level of domain
18 domain. Domains have no particular names in this implementation, but
20 cpus on the machine, while domain0 is the most tightly focused domain,
22 are no architectures which need more than three domain levels. The first
23 field in the domain stats is a bit map indicating which cpus are affected
24 by that domain.
65 Domain statistics
67 One of these is produced per domain for each cpu described. (Note that if
71 domain<N> <cpumask> 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 3…
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/openbmc/linux/include/linux/sched/
H A Dsd_flags.h13 * SHARED_CHILD: These flags are meant to be set from the base domain upwards.
14 * If a domain has this flag set, all of its children should have it set. This
16 * domain share the same resource), or because they are tied to a scheduling
20 * In those cases it doesn't make sense to have the flag set for a domain but
26 * SHARED_PARENT: These flags are meant to be set from the highest domain
27 * downwards. If a domain has this flag set, all of its parents should have it
29 * certain level (e.g. domain starts spanning CPUs outside of the base CPU's
38 * NEEDS_GROUPS: These flags are only relevant if the domain they are set on has
48 * SHARED_CHILD: Set from the base domain up to cpuset.sched_relax_domain_level.
56 * SHARED_CHILD: Set from the base domain up to the NUMA reclaim level.
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/openbmc/linux/net/netlabel/
H A Dnetlabel_domainhash.c3 * NetLabel Domain Hash Table
5 * This file manages the domain hash table that NetLabel uses to determine
6 * which network labeling protocol to use for a given domain. The NetLabel
40 /* Domain hash table */
51 * Domain Hash Table Helper Functions
55 * netlbl_domhsh_free_entry - Frees a domain hash table entry
90 kfree(ptr->domain); in netlbl_domhsh_free_entry()
95 * netlbl_domhsh_hash - Hashing function for the domain hash table
96 * @key: the domain name to hash
99 * This is the hashing function for the domain hash table, it returns the
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/openbmc/u-boot/arch/arm/include/asm/mach-imx/
H A Drdc-sema.h14 * d[x] means domain[x], x can be [3 - 0].
40 #define RDC_PDAP_DW_SHIFT(domain) ((domain) << 1) argument
41 #define RDC_PDAP_DR_SHIFT(domain) (1 + RDC_PDAP_DW_SHIFT(domain)) argument
42 #define RDC_PDAP_DW_MASK(domain) (1 << RDC_PDAP_DW_SHIFT(domain)) argument
43 #define RDC_PDAP_DR_MASK(domain) (1 << RDC_PDAP_DR_SHIFT(domain)) argument
44 #define RDC_PDAP_DRW_MASK(domain) (RDC_PDAP_DW_MASK(domain) | \ argument
45 RDC_PDAP_DR_MASK(domain))
58 #define RDC_MRC_DW_SHIFT(domain) (domain) argument
59 #define RDC_MRC_DR_SHIFT(domain) (1 + RDC_MRC_DW_SHIFT(domain)) argument
60 #define RDC_MRC_DW_MASK(domain) (1 << RDC_MRC_DW_SHIFT(domain)) argument
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/openbmc/linux/include/trace/events/
H A Dkyber.h16 TP_PROTO(dev_t dev, const char *domain, const char *type,
20 TP_ARGS(dev, domain, type, percentile, numerator, denominator, samples),
24 __array( char, domain, DOMAIN_LEN )
34 strscpy(__entry->domain, domain, sizeof(__entry->domain));
43 MAJOR(__entry->dev), MINOR(__entry->dev), __entry->domain,
50 TP_PROTO(dev_t dev, const char *domain, unsigned int depth),
52 TP_ARGS(dev, domain, depth),
56 __array( char, domain, DOMAIN_LEN )
62 strscpy(__entry->domain, domain, sizeof(__entry->domain));
67 MAJOR(__entry->dev), MINOR(__entry->dev), __entry->domain,
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/openbmc/linux/Documentation/devicetree/bindings/dvfs/
H A Dperformance-domain.yaml4 $id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#
14 CPUs that run in the same performance domain. Performance domains must not
15 be confused with power domains. A performance domain is defined by a set
17 performance domain, there is a single point of control that affects all the
18 devices in the domain, making it impossible to set the performance level of
19 an individual device in the domain independently from other devices in
20 that domain. For example, a set of CPUs that share a voltage domain, and
22 domain.
24 This device tree binding can be used to bind performance domain consumer
25 devices with their performance domains provided by performance domain
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