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/openbmc/linux/include/linux/soc/apple/
H A Drtkit.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
6 * Apple's SoCs come with various co-processors running their RTKit operating
18 * Struct to represent implementation-specific RTKit operations.
21 * @iomem: Shared memory buffer controlled by the co-processors.
24 * @is_mapped: Shared memory buffer is managed by the co-processor.
38 * Struct to represent implementation-specific RTKit operations.
40 * @crashed: Called when the co-processor has crashed. Runs in process
43 * on a non-system endpoint. Called from a worker thread.
50 * buffer is managed by the co-processor and needs to be mapped.
74 * @mbox_name: mailbox name used to communicate with the co-processor
[all …]
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dst-rproc.txt1 STMicroelectronics Co-Processor Bindings
2 ----------------------------------------
6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the primary OS must detect its state
11 - compatible Should be one of:
12 "st,st231-rproc"
13 "st,st40-rproc"
14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt)
15 - resets Reset lines (See: ../reset/reset.txt)
16 - reset-names Must be "sw_reset" and "pwr_reset"
[all …]
H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
[all …]
H A Dmtk,scp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tinghan Shen <tinghan.shen@mediatek.com>
13 This binding provides support for ARM Cortex M4 Co-processor found on some
19 - mediatek,mt8183-scp
20 - mediatek,mt8186-scp
21 - mediatek,mt8188-scp
22 - mediatek,mt8192-scp
23 - mediatek,mt8195-scp
[all …]
H A Dwkup_m3_rproc.txt4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
6 that cannot be controlled from the MPU. This CM3 processor requires a firmware
12 A wkup_m3 device node is used to represent the Wakeup M3 processor instance
17 --------------------
18 - compatible: Should be one of,
19 "ti,am3352-wkup-m3" for AM33xx SoCs
20 "ti,am4372-wkup-m3" for AM43xx SoCs
21 - reg: Should contain the address ranges for the two internal
25 - reg-names: Contains the corresponding names for the two memory
27 - ti,hwmods: Name of the hwmod associated with the wkupm3 device.
[all …]
/openbmc/linux/Documentation/networking/devlink/
H A Dsfc.rst1 .. SPDX-License-Identifier: GPL-2.0
15 .. list-table:: devlink info versions implemented
18 * - Name
19 - Type
20 - Description
21 * - ``fw.mgmt.suc``
22 - running
23 - For boards where the management function is split between multiple
25 * - ``fw.mgmt.cmc``
26 - running
[all …]
/openbmc/linux/Documentation/powerpc/
H A Dvas-api.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. _VAS-API:
11 Power9 processor introduced Virtual Accelerator Switchboard (VAS) which
12 allows both userspace and kernel communicate to co-processor
14 unit comprises of one or more hardware engines or co-processor types
21 Requests to the GZIP engine must be formatted as a co-processor Request
38 /dev/crypto/nx-gzip device node implemented by the VAS/NX device driver.
39 An application must open the /dev/crypto/nx-gzip device to obtain a file
58 NX-GZIP Device Node
61 There is one /dev/crypto/nx-gzip node in the system and it provides
[all …]
/openbmc/linux/arch/sh/include/asm/
H A Duser.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 * linux we use the `trad-core' bfd). The file contents are as follows:
19 * data: The data segment follows next. We use current->end_text to
20 * current->brk to pick up all of the user variables, plus any memory
22 * page is demand-zero or if a page is totally unused, we just cover
27 * current->start_stack, so we round each of these in order to be able
40 struct user_fpu_struct fpu; /* Math Co-processor registers */
41 int u_fpvalid; /* True if math co-processor being used */
50 struct user_fpu_struct* u_fpstate; /* Math Co-processor pointer */
/openbmc/linux/arch/x86/include/asm/
H A Duser32.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 u32 st_space[20]; /* 8*10 bytes for each FP-reg = 80 bytes */
31 int st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
32 int xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
48 int u_fpvalid; /* True if math co-processor being used. */
50 struct user_i387_ia32_struct i387; /* Math Co-processor registers. */
64 __u32 u_fpstate; /* Math Co-processor pointer. */
H A Duser_32.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 linux we use the 'trad-core' bfd). There are quite a number of
20 DATA: The data area is stored. We use current->end_text to
21 current->brk to pick up all of the user variables, plus any memory
23 is demand-zero or if a page is totally unused, we just cover the entire
28 current->start_stack, so we round each of these off in order to be able
38 * interacting with the FXSR-format floating point environment. Floating
53 long st_space[20]; /* 8*10 bytes for each FP-reg = 80 bytes */
67 long st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
68 long xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
[all …]
H A Duser_64.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 DATA: The data area is stored. We use current->end_text to
23 current->brk to pick up all of the user variables, plus any memory
25 is demand-zero or if a page is totally unused, we just cover the entire
30 current->start_stack, so we round each of these off in order to be able
39 * interacting with the FXSR-format floating point environment. Floating
45 * x86-64 support by Andi Kleen.
61 __u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
62 __u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
99 /* When the kernel dumps core, it starts by dumping the user struct -
[all …]
/openbmc/linux/kernel/
H A Dcpu_pm.c1 // SPDX-License-Identifier: GPL-2.0-only
53 * cpu_pm_register_notifier - register a driver with cpu_pm
74 * cpu_pm_unregister_notifier - unregister a driver with cpu_pm
94 * cpu_pm_enter - CPU low power entry notifier
102 * co-processor, interrupt controller and its PM extensions, local CPU
115 * cpu_pm_exit - CPU low power exit notifier
120 * Notified drivers can include VFP co-processor, interrupt controller
133 * cpu_cluster_pm_enter - CPU cluster low power entry notifier
140 * domain. Notified drivers can include VFP co-processor, interrupt controller
155 * cpu_cluster_pm_exit - CPU cluster low power exit notifier
[all …]
/openbmc/linux/drivers/crypto/chelsio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Chelsio Crypto Co-processor Driver"
12 The Chelsio Crypto Co-processor driver for T6 adapters.
20 Please send feedback to <linux-bugs@chelsio.com>.
/openbmc/linux/arch/m68k/include/asm/
H A Duser.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 linux we use the 'trad-core' bfd). There are quite a number of
19 DATA: The data area is stored. We use current->end_text to
20 current->brk to pick up all of the user variables, plus any memory
22 is demand-zero or if a page is totally unused, we just cover the entire
27 current->start_stack, so we round each of these off in order to be able
33 unsigned long fpregs[8*3]; /* fp0-fp7 registers */
54 /* When the kernel dumps core, it starts by dumping the user struct -
62 int u_fpvalid; /* True if math co-processor being used. */
64 struct user_m68kfp_struct m68kfp; /* Math Co-processor registers. */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dapple,mailbox.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
11 - Sven Peter <sven@svenpeter.dev>
15 messages between the main CPU and a co-processor. Multiple instances
17 One of the two FIFOs is used to send data to a co-processor while the other
25 - description:
30 - enum:
31 - apple,t8103-asc-mailbox
[all …]
/openbmc/u-boot/doc/
H A DREADME.xtensa1 U-Boot for the Xtensa Architecture
5 -------------------------------------
7 Xtensa is a configurable processor architecture from Tensilica, Inc.
8 Diamond Cores are pre-configured instances available for license and
12 and custom instructions, registers and co-processors. The custom core
14 Processor Generator.
18 Xtensa CPUs in U-Boot. Therefore, there is only a single 'xtensa' CPU
19 in the cpu tree of U-Boot.
21 In the same manner as the Linux port to Xtensa, U-Boot adapts to an
24 abstraction layer (HAL). For the purpose of U-Boot, the HAL consists only
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/powerpc/power9/
H A Dother.json45 …"BriefDescription": "The processor's data cache was reloaded from a location other than the local …
65 "BriefDescription": "Read-write data cache collisions"
90 "BriefDescription": "D-cache invalidates sent over the reload bus to the core"
95 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory d…
145 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st…
200 "BriefDescription": "Read-write data cache collisions"
255 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st…
260 "BriefDescription": "L3 CO received retry port 3 (memory only), every retry counted"
270 "BriefDescription": "L3 CO to memory port 0 with or without data"
280 …-word boundary, which causes it to require an additional slice than than what normally would be re…
[all …]
/openbmc/linux/Documentation/devicetree/bindings/nvme/
H A Dapple,nvme-ans.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvme/apple,nvme-ans.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sven Peter <sven@svenpeter.dev>
15 - enum:
16 - apple,t8103-nvme-ans2
17 - apple,t8112-nvme-ans2
18 - apple,t6000-nvme-ans2
19 - const: apple,nvme-ans2
[all …]
/openbmc/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra210-bpmp.txt1 NVIDIA Tegra210 Boot and Power Management Processor (BPMP)
3 The Boot and Power Management Processor (BPMP) is a co-processor found
12 - compatible
15 - "nvidia,tegra210-bpmp"
16 - reg: physical base address and length for HW synchornization primitives
19 - interrupts: specifies the interrupt number for receiving messages ("rx")
23 - #clock-cells : Should be 1 for platforms where DRAM clock control is
29 compatible = "nvidia,tegra210-bpmp";
34 interrupt-names = "tx", "rx";
/openbmc/linux/drivers/soc/apple/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 The PMGR block in Apple SoCs provides high-level power state
21 tristate "Apple RTKit co-processor IPC protocol"
26 Apple SoCs such as the M1 come with various co-processors running
/openbmc/docs/designs/
H A Dpower-systems-memory-preserving-reboot.md15 don't have access to a non-volatile storage to store this content after a
18 explains the high-level flow of warm reboot and extraction of the resulting dump
23 - **Boot**: The process of initializing hardware components in a computer system
26 - **Hostboot**: The firmware runs on the host processors and performs all
27 processor, bus, and memory initialization on POWER based servers.
28 [read more](https://github.com/open-power/docs/blob/master/hostboot/HostBoot_PG.md)
30 - **Self Boot Engine (SBE)**: A microcontroller built into the host processors
31 of POWER systems to assist in initializing the processor during the boot. It
33 processor. [read more](https://sched.co/SPZP)
35 - **Master Processor**: The processor which gets initialized first to execute
[all …]
/openbmc/u-boot/arch/arm/include/asm/mach-imx/
H A Dhab.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2012-2015 Freescale Semiconductor, Inc. All Rights Reserved.
43 u8 len[2]; /* Length field in bytes (big-endian) */
47 /* -------- start of HAB API updates ------------*/
61 HAB_CFG_OPEN = 0xf0, /* < Non-secure IC */
68 HAB_STATE_CHECK = 0x55, /* Check state (non-secure) */
69 HAB_STATE_NONSECURE = 0x66, /* Non-secure state */
154 #define HAB_ENG_RTIC 0x05 /* Run-time integrity checker */
158 #define HAB_ENG_DCP 0x1b /* Data Co-Processor */
160 #define HAB_ENG_SNVS 0x1e /* Secure Non-Volatile Storage */
[all …]
/openbmc/linux/arch/arm/mm/
H A Dproc-v6.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-v6.S
8 * This is the "shell" of the ARMv6 processor support.
14 #include <asm/asm-offsets.h>
16 #include <asm/pgtable-hwdef.h>
18 #include "proc-macros.S"
54 * - loc - location to jump to for soft reset
71 * Idle the processor (eg, wait for interrupt).
77 mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
93 * - pgd_phys - physical address of new TTB
[all …]
/openbmc/linux/arch/powerpc/include/asm/
H A Dvas.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 2016-17 IBM Corp.
11 #include <uapi/asm/vas-api.h>
46 #define MASK_LSH(m) (__builtin_ffsl(m) - 1)
51 * Co-processor Engine type.
103 put_pid(ref->pid); in put_vas_user_win_ref()
104 put_pid(ref->tgid); in put_vas_user_win_ref()
105 if (ref->mm) in put_vas_user_win_ref()
106 mmdrop(ref->mm); in put_vas_user_win_ref()
111 mm_context_add_vas_window(ref->mm); in vas_user_win_add_mm_context()
[all …]
/openbmc/linux/arch/sparc/include/uapi/asm/
H A Dpsr.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * the processor status register on the Sparc. This is valid
17 * ------------------------------------------------------------------------
19 * | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 |
20 * ------------------------------------------------------------------------
26 #define PSR_PIL 0x00000f00 /* processor interrupt level */
28 #define PSR_EC 0x00002000 /* enable co-processor */
30 #define PSR_LE 0x00008000 /* SuperSparcII little-endian */
36 #define PSR_VERS 0x0f000000 /* cpu-version field */
37 #define PSR_IMPL 0xf0000000 /* cpu-implementation field */

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