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/openbmc/linux/drivers/isdn/capi/
H A Dkcapi.c66 capi_ctr_get(struct capi_ctr *ctr) in capi_ctr_get() argument
68 if (!try_module_get(ctr->owner)) in capi_ctr_get()
70 return ctr; in capi_ctr_get()
74 capi_ctr_put(struct capi_ctr *ctr) in capi_ctr_put() argument
76 module_put(ctr->owner); in capi_ctr_put()
147 register_appl(struct capi_ctr *ctr, u16 applid, capi_register_params *rparam) in register_appl() argument
149 ctr = capi_ctr_get(ctr); in register_appl()
151 if (ctr) in register_appl()
152 ctr->register_appl(ctr, applid, rparam); in register_appl()
159 static void release_appl(struct capi_ctr *ctr, u16 applid) in release_appl() argument
[all …]
H A Dkcapi_proc.c66 struct capi_ctr *ctr = *(struct capi_ctr **) v; in controller_show() local
68 if (!ctr) in controller_show()
72 ctr->cnr, ctr->driver_name, in controller_show()
73 state2str(ctr->state), in controller_show()
74 ctr->name, in controller_show()
75 ctr->procinfo ? ctr->procinfo(ctr) : ""); in controller_show()
82 struct capi_ctr *ctr = *(struct capi_ctr **) v; in contrstats_show() local
84 if (!ctr) in contrstats_show()
88 ctr->cnr, in contrstats_show()
89 ctr->nrecvctlpkt, in contrstats_show()
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/openbmc/linux/drivers/media/platform/qcom/venus/
H A Dvenc_ctrls.c73 struct venc_controls *ctr = &inst->controls.enc; in venc_op_s_ctrl() local
84 ctr->bitrate_mode = ctrl->val; in venc_op_s_ctrl()
87 ctr->bitrate = ctrl->val; in venc_op_s_ctrl()
91 brate.bitrate = ctr->bitrate; in venc_op_s_ctrl()
103 ctr->bitrate_peak = ctrl->val; in venc_op_s_ctrl()
106 ctr->h264_entropy_mode = ctrl->val; in venc_op_s_ctrl()
109 ctr->profile.mpeg4 = ctrl->val; in venc_op_s_ctrl()
112 ctr->profile.h264 = ctrl->val; in venc_op_s_ctrl()
115 ctr->profile.hevc = ctrl->val; in venc_op_s_ctrl()
118 ctr->profile.vp8 = ctrl->val; in venc_op_s_ctrl()
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H A Dvenc.c664 struct venc_controls *ctr = &inst->controls.enc; in venc_set_properties() local
709 ctr->h264_entropy_mode); in venc_set_properties()
719 ctr->h264_loop_filter_mode); in venc_set_properties()
720 deblock.slice_alpha_offset = ctr->h264_loop_filter_alpha; in venc_set_properties()
721 deblock.slice_beta_offset = ctr->h264_loop_filter_beta; in venc_set_properties()
729 if (ctr->profile.h264 == V4L2_MPEG_VIDEO_H264_PROFILE_HIGH || in venc_set_properties()
730 ctr->profile.h264 == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) in venc_set_properties()
731 h264_transform.enable_type = ctr->h264_8x8_transform; in venc_set_properties()
754 ctr->profile.hevc == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) { in venc_set_properties()
762 ctr->mastering.display_primaries_x[c]; in venc_set_properties()
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H A Dvdec_ctrls.c16 struct vdec_controls *ctr = &inst->controls.dec; in vdec_op_s_ctrl() local
20 ctr->post_loop_deb_mode = ctrl->val; in vdec_op_s_ctrl()
26 ctr->profile = ctrl->val; in vdec_op_s_ctrl()
31 ctr->level = ctrl->val; in vdec_op_s_ctrl()
34 ctr->display_delay = ctrl->val; in vdec_op_s_ctrl()
37 ctr->display_delay_enable = ctrl->val; in vdec_op_s_ctrl()
40 ctr->conceal_color = *ctrl->p_new.p_s64; in vdec_op_s_ctrl()
52 struct vdec_controls *ctr = &inst->controls.dec; in vdec_op_g_volatile_ctrl() local
65 ctr->profile = profile; in vdec_op_g_volatile_ctrl()
66 ctrl->val = ctr->profile; in vdec_op_g_volatile_ctrl()
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/openbmc/linux/drivers/comedi/drivers/
H A Damplc_dio200.c35 * 1 CTR-Y1 PPI-Y PPI-Y
36 * 2 CTR-Y2 CTR-Z1* CTR-Z1
37 * 3 CTR-Z1 INTERRUPT* CTR-Z2
38 * 4 CTR-Z2 INTERRUPT
44 * 0 CTR-X1 PPI-X
45 * 1 CTR-X2 PPI-Y
46 * 2 CTR-Y1 PPI-Z
47 * 3 CTR-Y2 INTERRUPT
48 * 4 CTR-Z1
49 * 5 CTR-Z2
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H A Damplc_dio200_pci.c34 * 2 CTR-Z1 PPI-Y UNUSED
35 * 3 CTR-Z2 UNUSED UNUSED
36 * 4 INTERRUPT CTR-Z1 CTR-Z1
37 * 5 CTR-Z2 CTR-Z2
49 * 4 CTR-Z1
50 * 5 CTR-Z2
64 * Each CTR is a 8254 chip providing 3 16-bit counter channels. Each
178 * 4 CTR-Z1-OUT1 CTR-Z1-OUT1 CTR-Z1-OUT1
179 * 5 CTR-Z2-OUT1 CTR-Z2-OUT1 CTR-Z2-OUT1
188 * 4 PPI-Z-C0 CTR-Z1-OUT1
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/pm/
H A Dnv40.c28 struct nvkm_perfctr *ctr) in nv40_perfctr_init() argument
31 u32 log = ctr->logic_op; in nv40_perfctr_init()
36 src |= ctr->signal[i] << (i * 8); in nv40_perfctr_init()
39 nvkm_wr32(device, 0x00a400 + dom->addr + (ctr->slot * 0x40), src); in nv40_perfctr_init()
40 nvkm_wr32(device, 0x00a420 + dom->addr + (ctr->slot * 0x40), log); in nv40_perfctr_init()
45 struct nvkm_perfctr *ctr) in nv40_perfctr_read() argument
49 switch (ctr->slot) { in nv40_perfctr_read()
50 case 0: ctr->ctr = nvkm_rd32(device, 0x00a700 + dom->addr); break; in nv40_perfctr_read()
51 case 1: ctr->ctr = nvkm_rd32(device, 0x00a6c0 + dom->addr); break; in nv40_perfctr_read()
52 case 2: ctr->ctr = nvkm_rd32(device, 0x00a680 + dom->addr); break; in nv40_perfctr_read()
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H A Dbase.c129 nvkm_perfsrc_enable(struct nvkm_pm *pm, struct nvkm_perfctr *ctr) in nvkm_perfsrc_enable() argument
140 for (j = 0; j < 8 && ctr->source[i][j]; j++) { in nvkm_perfsrc_enable()
141 sig = nvkm_perfsig_find(pm, ctr->domain, in nvkm_perfsrc_enable()
142 ctr->signal[i], &dom); in nvkm_perfsrc_enable()
146 src = nvkm_perfsrc_find(pm, sig, ctr->source[i][j]); in nvkm_perfsrc_enable()
155 value |= ((ctr->source[i][j] >> 32) << src->shift); in nvkm_perfsrc_enable()
168 nvkm_perfsrc_disable(struct nvkm_pm *pm, struct nvkm_perfctr *ctr) in nvkm_perfsrc_disable() argument
179 for (j = 0; j < 8 && ctr->source[i][j]; j++) { in nvkm_perfsrc_disable()
180 sig = nvkm_perfsig_find(pm, ctr->domain, in nvkm_perfsrc_disable()
181 ctr->signal[i], &dom); in nvkm_perfsrc_disable()
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H A Dgf100.c129 struct nvkm_perfctr *ctr) in gf100_perfctr_init() argument
132 u32 log = ctr->logic_op; in gf100_perfctr_init()
137 src |= ctr->signal[i] << (i * 8); in gf100_perfctr_init()
141 nvkm_wr32(device, dom->addr + 0x040 + (ctr->slot * 0x08), src); in gf100_perfctr_init()
142 nvkm_wr32(device, dom->addr + 0x044 + (ctr->slot * 0x08), log); in gf100_perfctr_init()
147 struct nvkm_perfctr *ctr) in gf100_perfctr_read() argument
151 switch (ctr->slot) { in gf100_perfctr_read()
152 case 0: ctr->ctr = nvkm_rd32(device, dom->addr + 0x08c); break; in gf100_perfctr_read()
153 case 1: ctr->ctr = nvkm_rd32(device, dom->addr + 0x088); break; in gf100_perfctr_read()
154 case 2: ctr->ctr = nvkm_rd32(device, dom->addr + 0x080); break; in gf100_perfctr_read()
[all …]
/openbmc/linux/drivers/parport/
H A Dparport_gsc.h52 /* Contents of CTR. */
53 unsigned char ctr; member
55 /* Bitmask of writable CTR bits. */
93 unsigned char ctr = priv->ctr; in __parport_gsc_frob_control() local
97 ctr, ((ctr & ~mask) ^ val) & priv->ctr_writable); in __parport_gsc_frob_control()
99 ctr = (ctr & ~mask) ^ val; in __parport_gsc_frob_control()
100 ctr &= priv->ctr_writable; /* only write writable bits. */ in __parport_gsc_frob_control()
101 parport_writeb (ctr, CONTROL (p)); in __parport_gsc_frob_control()
102 priv->ctr = ctr; /* Update soft copy */ in __parport_gsc_frob_control()
103 return ctr; in __parport_gsc_frob_control()
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/openbmc/u-boot/post/lib_powerpc/
H A Db.c18 * fields, the CTR and the condition register values are
29 extern void cpu_post_exec_31 (ulong *code, ulong *ctr, ulong *lr, ulong *jump,
37 ulong ctr = pctr; in cpu_post_test_bc() local
55 cpu_post_exec_31 (code, &ctr, &lr, &jump, cr); in cpu_post_test_bc()
62 ret = pctr == ctr + 1 ? 0 : -1; in cpu_post_test_bc()
64 ret = pctr == ctr ? 0 : -1; in cpu_post_test_bc()
133 ulong ctr; in cpu_post_test_b() local
146 for (ctr = 1; ctr <= 2 && ret == 0; ctr++) in cpu_post_test_b()
154 (cd == 0 && ctr != 1) || in cpu_post_test_b()
155 (cd == 1 && ctr == 1); in cpu_post_test_b()
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/openbmc/linux/arch/arc/include/asm/
H A Datomic-llsc.h14 "1: llock %[val], [%[ctr]] \n" \
16 " scond %[val], [%[ctr]] \n" \
19 : [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \
30 "1: llock %[val], [%[ctr]] \n" \
32 " scond %[val], [%[ctr]] \n" \
35 : [ctr] "r" (&v->counter), \
51 "1: llock %[orig], [%[ctr]] \n" \
53 " scond %[val], [%[ctr]] \n" \
57 : [ctr] "r" (&v->counter), \
/openbmc/linux/include/linux/
H A Dparport_pc.h20 /* Contents of CTR. */
21 unsigned char ctr; member
23 /* Bitmask of writable CTR bits. */
103 dcr = i ? priv->ctr : inb (CONTROL (p)); in dump_parport_state()
136 unsigned char ctr = priv->ctr; in __parport_pc_frob_control() local
140 mask, val, ctr, ((ctr & ~mask) ^ val) & priv->ctr_writable); in __parport_pc_frob_control()
142 ctr = (ctr & ~mask) ^ val; in __parport_pc_frob_control()
143 ctr &= priv->ctr_writable; /* only write writable bits. */ in __parport_pc_frob_control()
144 outb (ctr, CONTROL (p)); in __parport_pc_frob_control()
145 priv->ctr = ctr; /* Update soft copy */ in __parport_pc_frob_control()
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/openbmc/linux/lib/crypto/
H A Dcurve25519-hacl64.c88 u32 ctr = 0; in fproduct_carry_wide_() local
89 u128 tctr = tmp[ctr]; in fproduct_carry_wide_()
90 u128 tctrp1 = tmp[ctr + 1]; in fproduct_carry_wide_()
93 tmp[ctr] = ((u128)(r0)); in fproduct_carry_wide_()
94 tmp[ctr + 1] = ((tctrp1) + (c)); in fproduct_carry_wide_()
97 u32 ctr = 1; in fproduct_carry_wide_() local
98 u128 tctr = tmp[ctr]; in fproduct_carry_wide_()
99 u128 tctrp1 = tmp[ctr + 1]; in fproduct_carry_wide_()
102 tmp[ctr] = ((u128)(r0)); in fproduct_carry_wide_()
103 tmp[ctr + 1] = ((tctrp1) + (c)); in fproduct_carry_wide_()
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/openbmc/linux/crypto/
H A Dccm.c20 struct crypto_skcipher_spawn ctr; member
26 struct crypto_skcipher *ctr; member
91 struct crypto_skcipher *ctr = ctx->ctr; in crypto_ccm_setkey() local
95 crypto_skcipher_clear_flags(ctr, CRYPTO_TFM_REQ_MASK); in crypto_ccm_setkey()
96 crypto_skcipher_set_flags(ctr, crypto_aead_get_flags(aead) & in crypto_ccm_setkey()
98 err = crypto_skcipher_setkey(ctr, key, keylen); in crypto_ccm_setkey()
309 skcipher_request_set_tfm(skreq, ctx->ctr); in crypto_ccm_encrypt()
373 skcipher_request_set_tfm(skreq, ctx->ctr); in crypto_ccm_decrypt()
398 struct crypto_skcipher *ctr; in crypto_ccm_init_tfm() local
406 ctr = crypto_spawn_skcipher(&ictx->ctr); in crypto_ccm_init_tfm()
[all …]
H A Dgcm.c23 struct crypto_skcipher_spawn ctr; member
28 struct crypto_skcipher *ctr; member
97 struct crypto_skcipher *ctr = ctx->ctr; in crypto_gcm_setkey() local
109 crypto_skcipher_clear_flags(ctr, CRYPTO_TFM_REQ_MASK); in crypto_gcm_setkey()
110 crypto_skcipher_set_flags(ctr, crypto_aead_get_flags(aead) & in crypto_gcm_setkey()
112 err = crypto_skcipher_setkey(ctr, key, keylen); in crypto_gcm_setkey()
116 data = kzalloc(sizeof(*data) + crypto_skcipher_reqsize(ctr), in crypto_gcm_setkey()
123 skcipher_request_set_tfm(&data->req, ctr); in crypto_gcm_setkey()
188 skcipher_request_set_tfm(skreq, ctx->ctr); in crypto_gcm_init_crypt()
524 struct crypto_skcipher *ctr; in crypto_gcm_init_tfm() local
[all …]
/openbmc/qemu/include/qemu/
H A Drcu.h59 unsigned long ctr; member
81 unsigned ctr; in QEMU_DECLARE_CO_TLS() local
87 ctr = qatomic_read(&rcu_gp_ctr); in QEMU_DECLARE_CO_TLS()
88 qatomic_set(&p_rcu_reader->ctr, ctr); in QEMU_DECLARE_CO_TLS()
91 * Read rcu_gp_ptr and write p_rcu_reader->ctr before reading in QEMU_DECLARE_CO_TLS()
107 * store to p_rcu_reader->ctr. Together with the following in rcu_read_unlock()
108 * smp_mb_placeholder(), this ensures writes to p_rcu_reader->ctr in rcu_read_unlock()
111 qatomic_store_release(&p_rcu_reader->ctr, 0); in rcu_read_unlock()
113 /* Write p_rcu_reader->ctr before reading p_rcu_reader->waiting. */ in rcu_read_unlock()
/openbmc/linux/net/rds/
H A Dstats.c87 struct rds_info_counter ctr; in rds_stats_info_copy() local
91 BUG_ON(strlen(names[i]) >= sizeof(ctr.name)); in rds_stats_info_copy()
92 strncpy(ctr.name, names[i], sizeof(ctr.name) - 1); in rds_stats_info_copy()
93 ctr.name[sizeof(ctr.name) - 1] = '\0'; in rds_stats_info_copy()
94 ctr.value = values[i]; in rds_stats_info_copy()
96 rds_info_copy(iter, &ctr, sizeof(ctr)); in rds_stats_info_copy()
/openbmc/linux/arch/powerpc/include/asm/
H A Dcell-pmu.h22 #define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1)))) argument
52 #define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) argument
68 extern u32 cbe_read_ctr(u32 cpu, u32 ctr);
69 extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val);
71 extern u32 cbe_read_pm07_control(u32 cpu, u32 ctr);
72 extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val);
/openbmc/linux/arch/s390/crypto/
H A DKconfig84 tristate "Ciphers: AES, modes: ECB, CBC, CTR, XTS, GCM"
91 Length-preserving ciphers: AES with ECB, CBC, XTS, and CTR modes
101 As of z196 the CTR mode is hardware accelerated for all AES
106 tristate "Ciphers: DES and Triple DES EDE, modes: ECB, CBC, CTR"
114 Length-preserving ciphers: DES with ECB, CBC, and CTR modes
115 Length-preserving ciphers: Triple DES EDED with ECB, CBC, and CTR modes
120 As of z196 the CTR mode is hardware accelerated.
/openbmc/linux/arch/arm64/crypto/
H A DKconfig132 tristate "Ciphers: AES, modes: ECB, CBC, CTR, CTS, XCTR, XTS"
136 Length-preserving ciphers: AES with ECB, CBC, CTR, CTS,
155 tristate "Ciphers: AES, modes: ECB/CBC/CTR/XTS (ARMv8 Crypto Extensions)"
164 - CTR (Counter) mode (NIST SP800-38A)
172 tristate "Ciphers: AES, modes: ECB/CBC/CTR/XTS (NEON)"
181 - CTR (Counter) mode (NIST SP800-38A)
202 tristate "Ciphers: AES, modes: ECB/CBC/CTR/XCTR/XTS modes (bit-sliced NEON)"
212 - CTR (Counter) mode (NIST SP800-38A)
234 tristate "Ciphers: SM4, modes: ECB/CBC/CFB/CTR/XTS (ARMv8 Crypto Extensions)"
244 - CTR (Counter) mode (NIST SP800-38A)
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/
H A Dtc_counters.c49 struct efx_tc_counter_index *ctr = ptr; in efx_tc_counter_id_free() local
51 WARN_ON(refcount_read(&ctr->ref)); in efx_tc_counter_id_free()
52 kfree(ctr); in efx_tc_counter_id_free()
212 struct efx_tc_counter_index *ctr) in efx_tc_flower_put_counter_index() argument
214 if (!refcount_dec_and_test(&ctr->ref)) in efx_tc_flower_put_counter_index()
216 rhashtable_remove_fast(&efx->tc->counter_id_ht, &ctr->linkage, in efx_tc_flower_put_counter_index()
218 efx_tc_flower_release_counter(efx, ctr->cnt); in efx_tc_flower_put_counter_index()
219 kfree(ctr); in efx_tc_flower_put_counter_index()
226 struct efx_tc_counter_index *ctr, *old; in efx_tc_flower_get_counter_index() local
229 ctr = kzalloc(sizeof(*ctr), GFP_USER); in efx_tc_flower_get_counter_index()
[all …]
/openbmc/u-boot/board/gdsys/common/
H A Dmclink.c30 unsigned int ctr = 0; in mclink_probe() local
43 if (ctr++ > 500) { in mclink_probe()
52 printf("waited %d us for mclink %d to come up\n", ctr * 100, k); in mclink_probe()
62 unsigned int ctr = 0; in mclink_send() local
81 if (ctr++ > 3) in mclink_send()
100 unsigned int ctr = 0; in mclink_receive() local
113 if (ctr++ > 3) in mclink_receive()
/openbmc/linux/arch/powerpc/platforms/cell/
H A Dpmu.c114 u32 cbe_read_ctr(u32 cpu, u32 ctr) in cbe_read_ctr() argument
117 u32 phys_ctr = ctr & (NR_PHYS_CTRS - 1); in cbe_read_ctr()
122 val = (ctr < NR_PHYS_CTRS) ? (val >> 16) : (val & 0xffff); in cbe_read_ctr()
128 void cbe_write_ctr(u32 cpu, u32 ctr, u32 val) in cbe_write_ctr() argument
133 phys_ctr = ctr & (NR_PHYS_CTRS - 1); in cbe_write_ctr()
138 if (ctr < NR_PHYS_CTRS) in cbe_write_ctr()
153 u32 cbe_read_pm07_control(u32 cpu, u32 ctr) in cbe_read_pm07_control() argument
157 if (ctr < NR_CTRS) in cbe_read_pm07_control()
158 READ_SHADOW_REG(pm07_control, pm07_control[ctr]); in cbe_read_pm07_control()
164 void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val) in cbe_write_pm07_control() argument
[all …]

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