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/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhip04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 HiSilicon Ltd.
6 * Copyright (C) 2013-2014 Linaro Ltd.
12 /* memory bus is 64-bit */
13 #address-cells = <2>;
14 #size-cells = <2>;
21 compatible = "hisilicon,hip04-bootwrapper";
22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
26 #address-cells = <1>;
27 #size-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dsc9863a.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/clock/sprd,sc9863a-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cells = <2>;
15 #size-cells = <0>;
17 cpu-map {
20 cpu = <&CPU0>;
23 cpu = <&CPU1>;
26 cpu = <&CPU2>;
29 cpu = <&CPU3>;
[all …]
H A Dsc9860.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
22 cpu = <&CPU0>;
25 cpu = <&CPU1>;
28 cpu = <&CPU2>;
[all …]
H A Dsc9836.dtsi10 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu0: cpu@0 {
20 device_type = "cpu";
21 compatible = "arm,cortex-a53";
23 enable-method = "psci";
26 cpu1: cpu@1 {
27 device_type = "cpu";
28 compatible = "arm,cortex-a53";
[all …]
H A Dums512.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/sprd,ums512-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
20 cpu-map {
23 cpu = <&CPU0>;
[all …]
/openbmc/linux/drivers/bus/
H A Darm-cci.c17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
67 #define DRIVER_NAME "ARM-CCI"
[all …]
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
17 clock-names = "apb_pclk";
19 out-ports {
22 remote-endpoint =
28 in-ports {
31 remote-endpoint =
39 compatible = "arm,coresight-tmc", "arm,primecell";
42 clock-names = "apb_pclk";
44 in-ports {
[all …]
H A Dhi3660-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2016-2018 HiSilicon Ltd.
15 compatible = "arm,coresight-etm4x", "arm,primecell";
18 clock-names = "apb_pclk";
19 cpu = <&cpu0>;
21 out-ports {
24 remote-endpoint =
32 compatible = "arm,coresight-etm4x", "arm,primecell";
35 clock-names = "apb_pclk";
36 cpu = <&cpu1>;
[all …]
/openbmc/linux/Documentation/networking/dsa/
H A Dconfiguration.rst1 .. SPDX-License-Identifier: GPL-2.0
10 .. _dsa-config-showcases:
13 -----------------------
33 interface. The CPU port is the switch port connected to an Ethernet MAC chip.
42 - when a DSA slave interface is brought up, the master interface is
44 - when the master interface is brought down, all DSA slave interfaces are
71 * lan1: 192.0.2.1/30 (192.0.2.0 - 192.0.2.3)
72 * lan2: 192.0.2.5/30 (192.0.2.4 - 192.0.2.7)
73 * lan3: 192.0.2.9/30 (192.0.2.8 - 192.0.2.11)
76 * br0: 192.0.2.129/25 (192.0.2.128 - 192.0.2.255)
[all …]
H A Ddsa.rst22 An Ethernet switch typically comprises multiple front-panel ports and one
23 or more CPU or management ports. The DSA subsystem currently relies on the
27 gateways, or even top-of-rack switches. This host Ethernet controller will
28 be later referred to as "master" and "cpu" in DSA terminology and code.
33 ports are referred to as "dsa" ports in DSA terminology and code. A collection
36 For each front-panel port, DSA creates specialized network devices which are
37 used as controlling and data-flowing endpoints for use by the Linux networking
43 Ethernet frame it receives to/from specific ports to help the management
46 - what port is this frame coming from
47 - what was the reason why this frame got forwarded
[all …]
H A Db53.rst1 .. SPDX-License-Identifier: GPL-2.0
20 The switch is, if possible, configured to enable a Broadcom specific 4-bytes
22 CPU interface, conversely, the CPU network interface should insert a similar
23 tag for packets entering the CPU port. The tag format is described in
30 configuration described in the :ref:`dsa-config-showcases`.
33 ----------------------------------
38 See :ref:`dsa-tagged-configuration`.
41 -------------------------------------
48 The configuration slightly differ from the :ref:`dsa-vlan-configuration`.
50 The b53 tags the CPU port in all VLANs, since otherwise any PVID untagged
[all …]
/openbmc/linux/sound/soc/generic/
H A Daudio-graph-card2.c1 // SPDX-License-Identifier: GPL-2.0
8 // based on ${LINUX}/sound/soc/generic/audio-graph-card.c
25 ports {
28 bitclock-master;
30 frame-master;
39 You can set daifmt at ports/port/endpoint.
42 sample0: left_j, bitclock-master, frame-master
43 sample1: i2s, bitclock-master
50 "format" property is no longer needed on DT if both CPU/Codec drivers are
59 linux/sound/soc/soc-utils.c
[all …]
H A Daudio-graph-card.c1 // SPDX-License-Identifier: GPL-2.0
8 // based on ${LINUX}/sound/soc/generic/simple-card.c
29 struct snd_soc_dapm_context *dapm = w->dapm; in graph_outdrv_event()
30 struct asoc_simple_priv *priv = snd_soc_card_get_drvdata(dapm->card); in graph_outdrv_event()
34 gpiod_set_value_cansleep(priv->pa_gpio, 1); in graph_outdrv_event()
37 gpiod_set_value_cansleep(priv->pa_gpio, 0); in graph_outdrv_event()
40 return -EINVAL; in graph_outdrv_event()
62 if (dai && (dai->component->driver->pcm_construct || in soc_component_is_pcm()
63 (dai->driver->ops && dai->driver->ops->pcm_new))) in soc_component_is_pcm()
73 struct device_node *top = dev->of_node; in graph_parse_convert()
[all …]
H A Daudio-graph-card2-custom-sample.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * audio-graph-card2-custom-sample.dtsi
8 * This sample indicates how to use audio-graph-card2 and its
9 * custom driver. "audio-graph-card2-custom-sample" is the custome driver
10 * which is using audio-graph-card2.
15 * #include "../../../../../sound/soc/generic/audio-graph-card2-custom-sample.dtsi"
23 * "compatible" on each test-component. see below
26 * - compatible = "test-cpu";
27 * + compatible = "test-cpu-verbose";
32 * - compatible = "test-codec";
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/openbmc/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_mdb.c1 // SPDX-License-Identifier: GPL-2.0+
11 u16 ports; member
18 u16 ports; member
25 INIT_LIST_HEAD(&lan966x->mdb_entries); in lan966x_mdb_init()
26 INIT_LIST_HEAD(&lan966x->pgid_entries); in lan966x_mdb_init()
33 list_for_each_entry_safe(mdb_entry, tmp, &lan966x->mdb_entries, list) { in lan966x_mdb_purge_mdb_entries()
34 list_del(&mdb_entry->list); in lan966x_mdb_purge_mdb_entries()
43 list_for_each_entry_safe(pgid_entry, tmp, &lan966x->pgid_entries, list) { in lan966x_mdb_purge_pgid_entries()
44 list_del(&pgid_entry->list); in lan966x_mdb_purge_pgid_entries()
62 list_for_each_entry(mdb_entry, &lan966x->mdb_entries, list) { in lan966x_mdb_entry_get()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-etm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-etm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
23 The Embedded Trace Macrocell (ETM) is a real-time trace module providing
31 - arm,coresight-etm3x
[all …]
H A Darm,embedded-trace-extension.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/arm,embedded-trace-extension.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Suzuki K Poulose <suzuki.poulose@arm.com>
12 - Mathieu Poirier <mathieu.poirier@linaro.org>
15 Arm Embedded Trace Extension(ETE) is a per CPU trace component that
16 allows tracing the CPU execution. It overlaps with the CoreSight ETMv4
19 components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer
26 pattern: "^ete([0-9a-f]+)$"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dhisilicon-hns-nic.txt4 - compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
5 "hisilicon,hns-nic-v1" is for hip05.
6 "hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
7 - ae-handle: accelerator engine handle for hns,
9 see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
12 are called debug ports.
16 In NIC mode of DSAF, all 6 PHYs are taken as ethernet ports to the CPU. The
17 port-id can be 2 to 7. Here is the diagram:
18 +-----+---------------+
[all …]
/openbmc/linux/drivers/net/ethernet/mscc/
H A Docelot.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
30 /* Caller must hold &ocelot->mact_lock */
36 /* Caller must hold &ocelot->mact_lock */
48 /* Caller must hold &ocelot->mact_lock */
82 /* Set MAC_CPU_COPY if the CPU port is used by a multicast entry */ in __ocelot_mact_learn()
90 if (mc_ports & BIT(ocelot->num_phys_ports)) in __ocelot_mact_learn()
109 mutex_lock(&ocelot->mact_lock); in ocelot_mact_learn()
111 mutex_unlock(&ocelot->mact_lock); in ocelot_mact_learn()
122 mutex_lock(&ocelot->mact_lock); in ocelot_mact_forget()
133 mutex_unlock(&ocelot->mact_lock); in ocelot_mact_forget()
[all …]
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15_a7.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
8 * HBI-0249A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15_CA7";
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
[all …]
/openbmc/linux/include/net/
H A Ddsa.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/net/dsa.h - Driver for Distributed Switch Architecture switch chips
4 * Copyright (c) 2008-2009 Marvell Semiconductor
123 /* List of switch ports */
124 struct list_head ports; member
126 /* Notifier chain for switch-wide events */
135 /* Maps offloaded LAG netdevs to a zero-based linear ID for
167 /* LAG IDs are one-based, the dst->lags array is zero-based */
169 for ((_id) = 1; (_id) <= (_dst)->lags_len; (_id)++) \
170 if ((_dst)->lags[(_id) - 1])
[all …]
/openbmc/linux/drivers/net/dsa/realtek/
H A Drtl8365mb.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Realtek SMI subdriver for the Realtek RTL8365MB-VC ethernet switch.
4 * Copyright (C) 2021 Alvin Šipraga <alsi@bang-olufsen.dk>
5 * Copyright (C) 2021 Michael Rasmussen <mir@bang-olufsen.dk>
7 * The RTL8365MB-VC is a 4+1 port 10/100/1000M switch controller. It includes 4
8 * integrated PHYs for the user facing ports, and an extension interface which
9 * can be connected to the CPU - or another PHY - via either MII, RMII, or
15 * .-----------------------------------.
17 * UTP <---------------> Giga PHY <-> PCS <-> P0 GMAC |
18 * UTP <---------------> Giga PHY <-> PCS <-> P1 GMAC |
[all …]
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
31 #mbox-cells = <1>;
33 clock-names = "apb_pclk";
[all …]
/openbmc/linux/tools/perf/Documentation/
H A Dperf-iostat.txt1 perf-iostat(1)
5 ----
6 perf-iostat - Show I/O performance metrics
9 --------
12 'perf iostat' <ports> \-- <command> [<options>]
15 -----------
18 - Inbound Read - I/O devices below root port read from the host memory, in MB
20 - Inbound Write - I/O devices below root port write to the host memory, in MB
22 - Outbound Read - CPU reads from I/O devices below root port, in MB
24 - Outbound Write - CPU writes to I/O devices below root port, in MB
[all …]
/openbmc/linux/drivers/tty/serial/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
19 comment "Non-8250 serial port support"
28 Cirrus Logic EP93xx CPU, say Y or M here.
89 bool "Early console using RISC-V SBI"
95 Support for early debug console using RISC-V SBI. This enables
101 tristate "BCM1xxx on-chip DUART serial support"
107 the BCM1250 and derived System-On-a-Chip (SOC) devices. Note that
113 the module will be called sb1250-duart.
129 bool "AT91 on-chip serial port support"
136 This enables the driver for the on-chip UARTs of the Atmel
[all …]

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