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Searched full:clk_top_sgm_325m_sel (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt7986-clk.h70 #define CLK_TOP_SGM_325M_SEL 47 macro
H A Dmediatek,mt7981-clk.h110 #define CLK_TOP_SGM_325M_SEL 97 macro
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmediatek,net.yaml487 #define CLK_TOP_SGM_325M_SEL 47
521 <&topckgen CLK_TOP_SGM_325M_SEL>;
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7986-topckgen.c239 MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_325M_SEL, "sgm_325m_sel",
H A Dclk-mt7981-topckgen.c357 MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_325M_SEL, "sgm_325m_sel",
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi553 <&topckgen CLK_TOP_SGM_325M_SEL>;