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Searched full:clk_top_cci400_sel (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,vcodec-decoder.yaml176 <&topckgen CLK_TOP_CCI400_SEL>,
191 <&topckgen CLK_TOP_CCI400_SEL>,
/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h115 #define CLK_TOP_CCI400_SEL 104 macro
H A Dmt8173-clk.h118 #define CLK_TOP_CCI400_SEL 108 macro
H A Dmt2712-clk.h155 #define CLK_TOP_CCI400_SEL 124 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c492 TOP_MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents,
H A Dclk-mt8173-topckgen.c580 MUX_GATE_FLAGS(CLK_TOP_CCI400_SEL, "cci400_sel",
H A Dclk-mt2712.c685 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x0a0, 16, 3, 23),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1398 <&topckgen CLK_TOP_CCI400_SEL>,
1413 <&topckgen CLK_TOP_CCI400_SEL>,