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/openbmc/linux/sound/soc/codecs/
H A Dnau8540.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #include <sound/soc-dapm.h>
39 { 1, 0x0 },
40 { 2, 0x2 },
41 { 4, 0x3 },
42 { 8, 0x4 },
43 { 16, 0x5 },
44 { 32, 0x6 },
45 { 3, 0x7 },
46 { 6, 0xa },
[all …]
H A Dpeb2466.c1 // SPDX-License-Identifier: GPL-2.0
3 // peb2466.c -- Infineon PEB2466 ALSA SoC driver
29 #define PEB2466_TLV_SIZE (sizeof((unsigned int []){TLV_DB_SCALE_ITEM(0, 0, 0)}) / \
43 u8 spi_tx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */
44 u8 spi_rx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */
69 #define PEB2466_CMD_W (0 << 5)
71 #define PEB2466_CMD_MASK 0x18
72 #define PEB2466_CMD_XOP 0x18 /* XOP is 0bxxx11xxx */
73 #define PEB2466_CMD_SOP 0x10 /* SOP is 0bxxx10xxx */
74 #define PEB2466_CMD_COP 0x00 /* COP is 0bxxx0xxxx, handle 0bxxx00xxx */
[all …]
H A Dsta350.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Codec driver for ST STA350 2.1-channel high-efficiency digital audio system
35 #include <sound/soc-dapm.h>
55 /* Power-up register defaults */
57 { 0x0, 0x63 },
58 { 0x1, 0x80 },
59 { 0x2, 0xdf },
60 { 0x3, 0x40 },
61 { 0x4, 0xc2 },
62 { 0x5, 0x5c },
[all …]
H A Dsta32x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Codec driver for ST STA32x 2.1-channel high-efficiency digital audio system
35 #include <sound/soc-dapm.h>
55 /* Power-up register defaults */
57 { 0x0, 0x63 },
58 { 0x1, 0x80 },
59 { 0x2, 0xc2 },
60 { 0x3, 0x40 },
61 { 0x4, 0xc2 },
62 { 0x5, 0x5c },
[all …]
H A Dak5558.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <sound/soc-dapm.h>
51 { 0x0, 0xFF }, /* 0x00 AK5558_00_POWER_MANAGEMENT1 */
52 { 0x1, 0x01 }, /* 0x01 AK5558_01_POWER_MANAGEMENT2 */
53 { 0x2, 0x01 }, /* 0x02 AK5558_02_CONTROL1 */
54 { 0x3, 0x00 }, /* 0x03 AK5558_03_CONTROL2 */
55 { 0x4, 0x00 }, /* 0x04 AK5558_04_CONTROL3 */
56 { 0x5, 0x00 } /* 0x05 AK5558_05_DSD */
78 "Sharp Roll-Off", "Slow Roll-Off",
79 "Short Delay Sharp Roll-Off", "Short Delay Slow Roll-Off",
[all …]
H A Dtlv320adcx140.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
41 "ti,gpo-config-1",
42 "ti,gpo-config-2",
43 "ti,gpo-config-3",
44 "ti,gpo-config-4",
48 { ADCX140_PAGE_SELECT, 0x00 },
49 { ADCX140_SW_RESET, 0x00 },
50 { ADCX140_SLEEP_CFG, 0x00 },
51 { ADCX140_SHDN_CFG, 0x05 },
[all …]
/openbmc/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-dai-tdm.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "mt8183-afe-clk.h"
11 #include "mt8183-afe-common.h"
12 #include "mt8183-interconnection.h"
13 #include "mt8183-reg.h"
28 TDM_OUT_I2S = 0,
33 TDM_BCK_NON_INV = 0,
38 TDM_LCK_NON_INV = 0,
48 TDM_CHANNEL_BCK_16 = 0,
54 TDM_CHANNEL_NUM_2 = 0,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra186-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
16 handles memory requests for 40-bit virtual addresses from internal clients
27 pattern: "^memory-controller@[0-9a-f]+$"
31 - enum:
32 - nvidia,tegra186-mc
[all …]
/openbmc/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-dai-tdm.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "mt8192-afe-clk.h"
12 #include "mt8192-afe-common.h"
13 #include "mt8192-afe-gpio.h"
14 #include "mt8192-interconnection.h"
30 TDM_OUT_I2S = 0,
36 TDM_BCK_NON_INV = 0,
41 TDM_LCK_NON_INV = 0,
51 TDM_CHANNEL_BCK_16 = 0,
57 TDM_CHANNEL_NUM_2 = 0,
[all …]
/openbmc/linux/tools/perf/tests/
H A Dapi-io.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #define TEMPL "/tmp/perf-test-XXXXXX"
24 ret = -1; \
26 } while (0)
33 ret = -1; \
35 } while (0)
44 if (fd < 0) { in make_test_file()
46 return -1; in make_test_file()
52 return -1; in make_test_file()
55 return 0; in make_test_file()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dstih407-clock.dtsi8 #include <dt-bindings/clock/stih407-clks.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
18 clk_sysin: clk-sysin {
19 #clock-cells = <0>;
20 compatible = "fixed-clock";
21 clock-frequency = <30000000>;
27 arm_periph_clk: clk-m-a9-periphs {
28 #clock-cells = <0>;
29 compatible = "fixed-factor-clock";
[all …]
H A Dstih410-clock.dtsi8 #include <dt-bindings/clock/stih410-clks.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 compatible = "st,stih410-clk", "simple-bus";
20 clk_sysin: clk-sysin {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
23 clock-frequency = <30000000>;
24 clock-output-names = "CLK_SYSIN";
30 arm_periph_clk: clk-m-a9-periphs {
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dsalvator-xs.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Salvator-X 2nd version board
5 * Copyright (C) 2015-2017 Renesas Electronics Corp.
8 #include "salvator-common.dtsi"
11 model = "Renesas Salvator-X 2nd version board";
12 compatible = "renesas,salvator-xs";
16 clock-frequency = <16640000>;
20 clock-frequency = <400000>;
22 versaclock6: clock-generator@6a {
24 reg = <0x6a>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Drenesas,rz-dmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 - $ref: dma-controller.yaml#
18 - enum:
19 - renesas,r9a07g043-dmac # RZ/G2UL
20 - renesas,r9a07g044-dmac # RZ/G2{L,LC}
21 - renesas,r9a07g054-dmac # RZ/V2L
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-timers.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
24 const: st,stm32-timers
32 clock-names:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dst,sta32x.txt7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
26 - st,output-conf: number, Selects the output configuration:
[all …]
H A Dst,sta350.txt7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
[all …]
H A Daudio-iio-aux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/audio-iio-aux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
16 - $ref: dai-common.yaml#
20 const: audio-iio-aux
22 io-channels:
26 io-channel-names:
28 Industrial I/O channel names related to io-channels.
[all …]
/openbmc/linux/drivers/iio/adc/
H A Dintel_mrfld_adc.c1 // SPDX-License-Identifier: GPL-2.0
30 #define BCOVE_GPADCREQ 0xDC
31 #define BCOVE_GPADCREQ_BUSY BIT(0)
67 complete(&adc->completion); in mrfld_adc_thread_isr()
76 struct regmap *regmap = adc->regmap; in mrfld_adc_single_conv()
82 reinit_completion(&adc->completion); in mrfld_adc_single_conv()
84 regmap_update_bits(regmap, BCOVE_MADCIRQ, BCOVE_ADCIRQ_ALL, 0); in mrfld_adc_single_conv()
85 regmap_update_bits(regmap, BCOVE_MIRQLVL1, BCOVE_LVL1_ADC, 0); in mrfld_adc_single_conv()
93 req = mrfld_adc_requests[chan->channel]; in mrfld_adc_single_conv()
98 timeout = wait_for_completion_interruptible_timeout(&adc->completion, in mrfld_adc_single_conv()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stmpe-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stmpe-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stefan Agner <stefan@agner.ch>
20 const: st,stmpe-adc
22 st,norequest-mask:
28 "#io-channel-cells":
32 - compatible
37 - |
[all …]
H A Dti,ads7924.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hugo Villeneuve <hvilleneuve@dimonoff.com>
25 vref-supply:
29 reset-gpios:
35 "#address-cells":
38 "#size-cells":
39 const: 0
41 "#io-channel-cells":
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/st/
H A Dst,quadfs.txt10 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible : shall be:
15 "st,quadfs-d0"
16 "st,quadfs-d2"
17 "st,quadfs-d3"
18 "st,quadfs-pll"
21 - #clock-cells : from common clock binding; shall be set to 1.
23 - reg : A Base address and length of the register set.
25 - clocks : from common clock binding
27 - clock-output-names : From common clock binding. The block has 4
[all …]
/openbmc/openbmc/meta-facebook/meta-minerva/recipes-phosphor/initrdscripts/phosphor-static-norootfs-init/
H A D99-platform-init4 if [ ! -c /dev/mem ]; then
9 FMC_WDT2_CTRL_VAL=$(/sbin/devmem 0x1e620064)
10 FMC_WDT2_CTRL_VAL=$((16#${FMC_WDT2_CTRL_VAL#"0x"}))
11 SET_VAL=$((FMC_WDT2_CTRL_VAL & 0xFFFFFFFE))
12 /sbin/devmem 0x1e620064 32 "$SET_VAL"
16 mkdir -p "$(dirname "${SLOT_FILE}")"
17 if [ "$((FMC_WDT2_CTRL_VAL & 0x00000010))" != "0" ]; then
20 echo "0" > "$SLOT_FILE"
24 # There are two end-device for smart valve and two communication interfaces.
34 # +----------+ +-------------+
[all …]
/openbmc/linux/drivers/media/pci/cx18/
H A Dcx18-av-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Derived from cx25840-core.c
11 #include "cx18-driver.h"
12 #include "cx18-io.h"
13 #include "cx18-cards.h"
17 u32 reg = 0xc40000 + (addr & ~3); in cx18_av_write()
18 u32 mask = 0xff; in cx18_av_write()
24 return 0; in cx18_av_write()
29 u32 reg = 0xc40000 + (addr & ~3); in cx18_av_write_expect()
33 x = (x & ~((u32)0xff << shift)) | ((u32)value << shift); in cx18_av_write_expect()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/leds/backlight/
H A Dmediatek,mt6370-backlight.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/mediatek,mt6370-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiaEn Wu <chiaen_wu@richtek.com>
21 - $ref: common.yaml#
26 - mediatek,mt6370-backlight
27 - mediatek,mt6372-backlight
29 default-brightness:
30 minimum: 0
[all …]

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