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/openbmc/linux/drivers/zorro/
H A Dzorro.ids23 0200 3-State
109 0d00 SupraDrive WordSync II [SCSI Host Adapter]
152 0d00 Impact 3001 [IDE Interface]
184 0300 ALF 3 [SCSI Host Adapter]
188 0300 ALF 3 [SCSI Host Adapter]
321 0d00 Picasso II/II+ (Segmented Mode) [Graphics Card]
370 1d00 FastATA 4000 [IDE Interface]
421 0d00 Blizzard 1230 [Accelerator]
426 3200 CyberVision64-3D Prototype [Graphics Card]
427 4300 CyberVision64-3D [Graphics Card]
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dcm5200.dts60 ata@3a00 {
64 i2c@3d00 {
H A Dmotionpro.dts67 i2c@3d00 {
71 i2c@3d40 {
92 3 0 0x50020000 0x00010000>;
108 anybus@3,0 {
110 reg = <3 0 0x10000>;
112 pro_module_general@3,0 {
114 reg = <3 0 3>;
116 pro_module_dio@3,800 {
118 reg = <3 0x800 2>;
H A Da3m071.dts72 phy0: ethernet-phy@3 {
77 ata@3a00 {
81 i2c@3d00 {
85 i2c@3d40 {
95 3 0 0xe9000000 0x00080000
127 fpga@3,0 {
129 reg = <3 0x0 0x00080000
131 interrupts = <0 0 3>; /* level low */
H A Ddigsy_mtc.dts62 i2c@3d00 {
79 i2c@3d40 {
86 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
87 0xc000 0 0 2 &mpc5200_pic 0 0 3
88 0xc000 0 0 3 &mpc5200_pic 0 0 3
89 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
133 interrupts = <1 2 3>; // Level-low
140 interrupts = <1 2 3>; // Level-low
146 interrupts = <1 3 3>;
H A Duc101.dts81 i2c@3d00 {
85 i2c@3d40 {
107 3 0 0x80000000 0x00800000>;
H A Da4m072.dts57 interrupts = <2 3 0>;
85 i2c@3d00 {
89 i2c@3d40 {
108 3 0 0x66000000 0x01000000
129 #address-cells = <3>;
136 0xc000 0 0 1 &mpc5200_pic 1 3 3
137 0xc000 0 0 2 &mpc5200_pic 1 3 3
138 0xc000 0 0 3 &mpc5200_pic 1 3 3
139 0xc000 0 0 4 &mpc5200_pic 1 3 3>;
H A Dmucmc52.dts84 i2c@3d00 {
88 i2c@3d40 {
104 0x8000 0 0 1 &mpc5200_pic 0 3 3
105 0x8000 0 0 2 &mpc5200_pic 0 3 3
106 0x8000 0 0 3 &mpc5200_pic 0 2 3
107 0x8000 0 0 4 &mpc5200_pic 0 1 3
117 3 0 0x80000000 0x00800000>;
160 simple100: gpio-controller-100@3,600100 {
162 reg = <3 0x00600100 0x1>;
166 simple104: gpio-controller-104@3,600104 {
[all …]
H A Dcharon.dts60 #interrupt-cells = <3>;
102 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
103 3 4 0 3 5 0 3 6 0 3 7 0
104 3 8 0 3 9 0 3 10 0 3 11 0
105 3 12 0 3 13 0 3 14 0 3 15 0>;
122 interrupts = <2 3 0>;
141 ata@3a00 {
147 i2c@3d00 {
156 i2c@3d40 {
186 3 0 0xe8000000 0x00080000>;
[all …]
H A Dlite5200.dts57 #interrupt-cells = <3>;
140 interrupts = <1 8 0 0 3 0>;
160 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
161 3 4 0 3 5 0 3 6 0 3 7 0
162 3 8 0 3 9 0 3 10 0 3 11 0
163 3 12 0 3 13 0 3 14 0 3 15 0>;
191 // interrupts = <2 3 0>;
197 // cell-index = <3>;
238 ata@3a00 {
244 i2c@3d00 {
[all …]
H A Dmpc5200b.dtsi58 #interrupt-cells = <3>;
149 interrupts = <1 8 0 0 3 0>;
171 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
172 3 4 0 3 5 0 3 6 0 3 7 0
173 3 8 0 3 9 0 3 10 0 3 11 0
174 3 12 0 3 13 0 3 14 0 3 15 0>;
197 interrupts = <2 3 0>;
233 ata@3a00 {
239 sclpc@3c00 {
245 i2c@3d00 {
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Domap3xxx-clocks.dtsi29 ti,max-div = <3>;
196 dpll4_ck: dpll4_ck@d00 {
220 dpll4_m2x2_ck: dpll4_m2x2_ck@d00 {
237 dpll3_ck: dpll3_ck@d00 {
262 dpll3_m3x2_ck: dpll3_m3x2_ck@d00 {
377 dpll4_m3x2_ck: dpll4_m3x2_ck@d00 {
406 ti,bit-shift = <3>;
436 dpll4_m4x2_ck: dpll4_m4x2_ck@d00 {
464 dpll4_m5x2_ck: dpll4_m5x2_ck@d00 {
492 dpll4_m6x2_ck: dpll4_m6x2_ck@d00 {
[all …]
H A Dstm32f469-disco-u-boot.dtsi168 <STM32_PINMUX('I', 3, AF12)>, /* D27 */
196 <STM32_PINMUX('D',14, AF12)>, /* D00 */
214 <STM32_PINMUX('F', 3, AF12)>, /* A03 */
219 <STM32_PINMUX('H', 3, AF12)>, /* SDNE0 */
H A Dstm32f429-disco-u-boot.dtsi174 <STM32_PINMUX('D',14, AF12)>, /* D00 */
190 <STM32_PINMUX('F', 3, AF12)>, /* A03 */
H A Dstm32429i-eval-u-boot.dtsi168 <STM32_PINMUX('I', 3, AF12)>, /* D27 */
196 <STM32_PINMUX('D',14, AF12)>, /* D00 */
205 <STM32_PINMUX('G', 3, AF12)>, /* A13 */
215 <STM32_PINMUX('F', 3, AF12)>, /* A03 */
220 <STM32_PINMUX('H', 3, AF12)>, /* SDNE0 */
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A D8xxx_gpio.txt56 gpio2: gpio-controller@d00 {
71 interrupts = <4 3>;
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3xxx-clocks.dtsi26 ti,max-div = <3>;
209 dpll4_ck: dpll4_ck@d00 {
233 dpll4_m2x2_ck: dpll4_m2x2_ck@d00 {
250 dpll3_ck: dpll3_ck@d00 {
307 ti,max-div = <3>;
317 ti,max-div = <3>;
348 dpll3_m3x2_ck: dpll3_m3x2_ck@d00 {
465 ti,bit-shift = <3>;
504 dpll4_m3x2_ck: dpll4_m3x2_ck@d00 {
538 dpll4_m4x2_ck: dpll4_m4x2_ck@d00 {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mpc.yaml79 i2c@3d00 {
/openbmc/linux/Documentation/devicetree/bindings/clock/ti/
H A Dgate.txt14 [3] Documentation/devicetree/bindings/clock/ti/clockdomain.txt
24 clock directly from a clockdomain, see [3] how
84 dpll4_m2x2_ck: dpll4_m2x2_ck@48004d00 {
97 ti,bit-shift = <3>;
/openbmc/u-boot/doc/
H A DREADME.pblimage51 3). Boot from Nand
77 40464000 3c3c2000 58000000 61000000
94 09000d00 00000000
/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpmh-rsc.yaml78 enum: [ 0, 1, 2, 3 ]
100 - const: drv-3
134 // 2, the register offsets for DRV2 start at 0D00, the register
149 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
156 <SLEEP_TCS 3>,
157 <WAKE_TCS 3>,
197 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
204 <SLEEP_TCS 3>,
205 <WAKE_TCS 3>,
/openbmc/linux/Documentation/arch/m68k/
H A Dbuddha-driver.rst54 $b00-$bff IDE-Select 3 (Port 1, Register set 1)
59 $d00-$dff IDE-Select 5 (Port 3, Register set 1,
152 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
157 value 3
164 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
/openbmc/linux/arch/powerpc/include/asm/
H A Dopal-api.h17 #define OPAL_PARTIAL -3
48 #define OPAL_RTC_READ 3
221 #define QUIESCE_LOCK_BREAK 3 /* Set to ignore locks. */
256 OPAL_EEH_STOPPED_MMIO_DMA_FREEZE = 3,
265 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL = 3,
269 OPAL_EEH_ACTION_SET_FREEZE_ALL = 3
276 OPAL_EEH_PE_ERROR = 3,
285 OPAL_EEH_SEV_PHB_FENCED = 3,
300 OPAL_ERR_INJECT_FUNC_IOA_LD_IO_DATA = 3,
322 OPAL_IO_WINDOW_TYPE = 3
[all …]
/openbmc/linux/arch/mips/boot/dts/brcm/
H A Dbcm7125.dtsi67 interrupts = <2>, <3>;
238 spi_l2_intc: interrupt-controller@411d00 {
H A Dbcm7420.dtsi67 interrupts = <2>, <3>;
258 "ethernet-phy-ieee802.3-c22";
299 spi_l2_intc: interrupt-controller@411d00 {

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