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/openbmc/qemu/tests/qemu-iotests/
H A D15410 # the Free Software Foundation; either version 2 of the License, or
34 trap "_cleanup; exit \$status" 0 1 2 3 15
44 CLUSTER_SIZE=4k
64 # 2. Head unaligned: -- -- 00 00
66 # 4. Both, 2 clusters: -- -- -- 00 | 00 -- -- --
68 $QEMU_IO -c "write -z 0 2k" "$TEST_IMG" | _filter_qemu_io
69 $QEMU_IO -c "write -z 10k 2k" "$TEST_IMG" | _filter_qemu_io
70 $QEMU_IO -c "write -z 17k 2k" "$TEST_IMG" | _filter_qemu_io
71 $QEMU_IO -c "write -z 27k 2k" "$TEST_IMG" | _filter_qemu_io
82 $QEMU_IO -c "write -P 0x11 32k 1k" "$TEST_IMG.base" | _filter_qemu_io
[all …]
H A D03710 # the Free Software Foundation; either version 2 of the License, or
34 trap "_cleanup; exit \$status" 0 1 2 3 15
47 CLUSTER_SIZE=4k
61 local sectors=$2
82 $QEMU_IO -c "write -P 0x77 0 2k" "$TEST_IMG" | _filter_qemu_io
83 $QEMU_IO -c "write -P 0x88 6k 2k" "$TEST_IMG" | _filter_qemu_io
84 $QEMU_IO -c "write -P 0x99 9k 2k" "$TEST_IMG" | _filter_qemu_io
86 $QEMU_IO -c "read -P 0x77 0 2k" "$TEST_IMG" | _filter_qemu_io
87 backing_io $((2 * 1024)) 8 read | $QEMU_IO "$TEST_IMG" | _filter_qemu_io
88 $QEMU_IO -c "read -P 0x88 6k 2k" "$TEST_IMG" | _filter_qemu_io
[all …]
H A D12210 # the Free Software Foundation; either version 2 of the License, or
37 trap "_cleanup; exit \$status" 0 1 2 3 15
49 $QEMU_IO -c "write -P 0x11 0 64M" "$TEST_IMG".base 2>&1 | _filter_qemu_io | _filter_testdir
57 $QEMU_IO -c "write -P 0x22 0 3M" "$TEST_IMG" 2>&1 | _filter_qemu_io | _filter_testdir
69 $QEMU_IO -c "write -P 0 0 3M" "$TEST_IMG" 2>&1 | _filter_qemu_io | _filter_testdir
72 $QEMU_IO -c "read -P 0 0 3M" "$TEST_IMG".orig 2>&1 | _filter_qemu_io | _filter_testdir
75 $QEMU_IO -c "read -P 0 0 3M" "$TEST_IMG".orig 2>&1 | _filter_qemu_io | _filter_testdir
77 $QEMU_IO -c "write -z 0 3M" "$TEST_IMG" 2>&1 | _filter_qemu_io | _filter_testdir
80 $QEMU_IO -c "read -P 0 0 3M" "$TEST_IMG".orig 2>&1 | _filter_qemu_io | _filter_testdir
83 $QEMU_IO -c "read -P 0 0 3M" "$TEST_IMG".orig 2>&1 | _filter_qemu_io | _filter_testdir
[all …]
H A D27111 # the Free Software Foundation; either version 2 of the License, or
37 trap "_cleanup; exit \$status" 0 1 2 3 15
88 # len: request length, passed directly to qemu-io (e.g: 256, 4k, 1M, ...)
119 offset="$(($c * 64 + $sc * 2 + $off))"
120 [ "$offset" != 0 ] && offset="${offset}k"
157 _run_test sc=0 len=1k
163 ### Write subcluster #2 (end of subcluster) ###
164 alloc="0 1 2"; zero=""
165 _run_test sc=2 off=1 len=1k
168 alloc="0 1 2 3"; zero=""
[all …]
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/dvb-apps/files/dvb-scan-table/dvb-t/
H A Dit-All22 CODE_RATE_HP = 2/3
25 TRANSMISSION_MODE = 8K
35 CODE_RATE_HP = 2/3
38 TRANSMISSION_MODE = 8K
48 CODE_RATE_HP = 2/3
51 TRANSMISSION_MODE = 8K
61 CODE_RATE_HP = 2/3
64 TRANSMISSION_MODE = 8K
74 CODE_RATE_HP = 2/3
77 TRANSMISSION_MODE = 8K
[all …]
H A Dnl-All8 CODE_RATE_HP = 1/2
11 TRANSMISSION_MODE = 8K
20 CODE_RATE_HP = 2/3
23 TRANSMISSION_MODE = 8K
32 CODE_RATE_HP = 1/2
35 TRANSMISSION_MODE = 8K
44 CODE_RATE_HP = 2/3
47 TRANSMISSION_MODE = 8K
56 CODE_RATE_HP = 2/3
59 TRANSMISSION_MODE = 8K
[all …]
H A Dfr-All6 CODE_RATE_HP = 2/3
9 TRANSMISSION_MODE = 8K
18 CODE_RATE_HP = 2/3
21 TRANSMISSION_MODE = 8K
30 CODE_RATE_HP = 2/3
33 TRANSMISSION_MODE = 8K
42 CODE_RATE_HP = 2/3
45 TRANSMISSION_MODE = 8K
54 CODE_RATE_HP = 2/3
57 TRANSMISSION_MODE = 8K
[all …]
H A Dcz-All8 CODE_RATE_HP = 2/3
11 TRANSMISSION_MODE = 8K
20 CODE_RATE_HP = 2/3
23 TRANSMISSION_MODE = 8K
32 CODE_RATE_HP = 2/3
35 TRANSMISSION_MODE = 8K
44 CODE_RATE_HP = 2/3
47 TRANSMISSION_MODE = 8K
56 CODE_RATE_HP = 2/3
59 TRANSMISSION_MODE = 8K
[all …]
H A Dee-All9 CODE_RATE_HP = 2/3
12 TRANSMISSION_MODE = 8K
21 CODE_RATE_HP = 2/3
24 TRANSMISSION_MODE = 8K
33 CODE_RATE_HP = 2/3
36 TRANSMISSION_MODE = 8K
45 CODE_RATE_HP = 2/3
48 TRANSMISSION_MODE = 8K
57 CODE_RATE_HP = 2/3
60 TRANSMISSION_MODE = 8K
[all …]
H A Des-Cadiz8 CODE_RATE_HP = 2/3
11 TRANSMISSION_MODE = 8K
20 CODE_RATE_HP = 2/3
23 TRANSMISSION_MODE = 8K
32 CODE_RATE_HP = 2/3
35 TRANSMISSION_MODE = 8K
40 # 498000000 8MHz 2/3 NONE QAM64 8k 1/4 NONE # C24 # TL02CA Arcos
45 CODE_RATE_HP = 2/3
48 TRANSMISSION_MODE = 8K
53 # 522000000 8MHz 2/3 NONE QAM64 8k 1/4 NONE # C27 # TL06CA Olvera
[all …]
H A Dau-Goulburn-Rocky_Hill19 TRANSMISSION_MODE = 2K
35 TRANSMISSION_MODE = 2K
53 TRANSMISSION_MODE = 2K
71 TRANSMISSION_MODE = 2K
89 TRANSMISSION_MODE = 2K
107 TRANSMISSION_MODE = 2K
124 TRANSMISSION_MODE = 2K
141 TRANSMISSION_MODE = 2K
158 TRANSMISSION_MODE = 2K
174 TRANSMISSION_MODE = 2K
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.c46 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dml32_dscceComputeDelay()
52 // N422/N420 operate at 2 pixels per clock in dml32_dscceComputeDelay()
57 pixelsPerClock = 2; in dml32_dscceComputeDelay()
59 pixelsPerClock = 2; in dml32_dscceComputeDelay()
86 wx = (w + 2) / 3; in dml32_dscceComputeDelay()
90 ax = (a + 2) / 3 + D + 6 + 1; in dml32_dscceComputeDelay()
98 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dml32_dscceComputeDelay()
120 Delay = Delay + 2; in dml32_dscComputeDelay()
126 Delay = Delay + 2; in dml32_dscComputeDelay()
132 Delay = Delay + 2; in dml32_dscComputeDelay()
[all …]
/openbmc/linux/drivers/ata/pata_parport/
H A Dfrpw.c30 static int cont_map[2] = { 0x08, 0x10 };
59 int h, l, k, ph; in frpw_read_block_int() local
64 for (k = 0; k < count; k++) { in frpw_read_block_int()
67 buf[k] = j44(l, h); in frpw_read_block_int()
73 ph = 2; in frpw_read_block_int()
76 for (k = 0; k < count; k++) { in frpw_read_block_int()
78 buf[k] = r0(); in frpw_read_block_int()
79 ph = 2 - ph; in frpw_read_block_int()
84 case 2: in frpw_read_block_int()
86 for (k = 0; k < count; k++) in frpw_read_block_int()
[all …]
H A Dfriq.c44 static int cont_map[2] = { 0x08, 0x10 };
71 int h, l, k, ph; in friq_read_block_int() local
76 for (k = 0; k < count; k++) { in friq_read_block_int()
79 buf[k] = j44(l, h); in friq_read_block_int()
84 ph = 2; in friq_read_block_int()
87 for (k = 0; k < count; k++) { in friq_read_block_int()
89 buf[k] = r0(); in friq_read_block_int()
90 ph = 2 - ph; in friq_read_block_int()
94 case 2: in friq_read_block_int()
96 for (k = 0; k < count - 2; k++) in friq_read_block_int()
[all …]
H A Dkbic.c33 static int cont_map[2] = { 0x80, 0x40 };
50 case 2: in kbic_read_regr()
72 case 2: in kbic_write_regr()
128 int k, a, b; in kbic_read_block() local
133 for (k = 0; k < count / 2; k++) { in kbic_read_block()
138 buf[2 * k] = j44(a, b); in kbic_read_block()
143 buf[2 * k + 1] = j44(a, b); in kbic_read_block()
149 for (k = 0; k < count / 4; k++) { in kbic_read_block()
153 buf[4 * k] = j53(r12w()); in kbic_read_block()
155 buf[4 * k + 1] = j53(r12w()); in kbic_read_block()
[all …]
H A Depia.c23 * 1 5/3 reads on ports 1 & 2, 8-bit writes
24 * 2 8-bit reads and writes
37 static int cont_map[2] = { 0, 0x80 };
57 case 2: in epia_read_regr()
81 case 2: in epia_write_regr()
129 int k, ph, a, b; in epia_read_block() local
135 for (k = 0; k < count; k++) { in epia_read_block()
136 w2(2+ph); a = r1(); in epia_read_block()
138 buf[k] = j44(a, b); in epia_read_block()
147 for (k = 0; k < count; k++) { in epia_read_block()
[all …]
H A Depat.c33 * cont = 2 internal EPAT registers
44 case 2: in epat_write_regr()
71 case 2: in epat_read_regr()
87 int k, ph, a, b; in epat_read_block() local
94 for (k = 0; k < count; k++) { in epat_read_block()
95 if (k == count-1) in epat_read_block()
103 buf[k] = j44(a, b); in epat_read_block()
112 for (k = 0; k < count; k++) { in epat_read_block()
113 if (k == count - 1) in epat_read_block()
117 buf[k] = j53(a, b); in epat_read_block()
[all …]
/openbmc/linux/tools/lib/
H A Dlist_sort.c14 __attribute__((nonnull(2,3,4)))
50 __attribute__((nonnull(2,3,4,5)))
129 * 2:1 balanced merges. Given two pending sublists of size 2^k, they are
130 * merged to a size-2^(k+1) list as soon as we have 2^k following elements.
132 * Thus, it will avoid cache thrashing as long as 3*2^k elements can
141 * Each time we increment "count", we set one bit (bit k) and clear
142 * bits k-1 .. 0. Each time this happens (except the very first time
143 * for each bit, when count increments to 2^k), we merge two lists of
144 * size 2^k into one list of size 2^(k+1).
147 * 2^k, which is when we have 2^k elements pending in smaller lists,
[all …]
/openbmc/linux/lib/
H A Dlist_sort.c15 __attribute__((nonnull(2,3,4)))
51 __attribute__((nonnull(2,3,4,5)))
130 * 2:1 balanced merges. Given two pending sublists of size 2^k, they are
131 * merged to a size-2^(k+1) list as soon as we have 2^k following elements.
133 * Thus, it will avoid cache thrashing as long as 3*2^k elements can
142 * Each time we increment "count", we set one bit (bit k) and clear
143 * bits k-1 .. 0. Each time this happens (except the very first time
144 * for each bit, when count increments to 2^k), we merge two lists of
145 * size 2^k into one list of size 2^(k+1).
148 * 2^k, which is when we have 2^k elements pending in smaller lists,
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c419 unsigned int CursorWidth[][2],
420 unsigned int CursorBPP[][2],
680 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
686 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
691 pixelsPerClock = 2; in dscceComputeDelay()
696 pixelsPerClock = 2; in dscceComputeDelay()
722 wx = (w + 2) / 3; in dscceComputeDelay()
726 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
734 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
745 Delay = Delay + 2; in dscComputeDelay()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c319 2)); in adjust_ReturnBW()
336 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
342 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
347 pixelsPerClock = 2; in dscceComputeDelay()
374 wx = (w + 2) / 3; in dscceComputeDelay()
378 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
386 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
397 Delay = Delay + 2; in dscComputeDelay()
403 Delay = Delay + 2; in dscComputeDelay()
409 Delay = Delay + 2; in dscComputeDelay()
[all …]
H A Ddisplay_mode_vba_20.c295 2)); in adjust_ReturnBW()
312 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
318 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
323 pixelsPerClock = 2; in dscceComputeDelay()
350 wx = (w + 2) / 3; in dscceComputeDelay()
354 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
362 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
373 Delay = Delay + 2; in dscComputeDelay()
379 Delay = Delay + 2; in dscComputeDelay()
385 Delay = Delay + 2; in dscComputeDelay()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c507 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
513 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
518 pixelsPerClock = 2; in dscceComputeDelay()
545 wx = (w + 2) / 3; in dscceComputeDelay()
549 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
557 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
568 Delay = Delay + 2; in dscComputeDelay()
574 Delay = Delay + 2; in dscComputeDelay()
580 Delay = Delay + 2; in dscComputeDelay()
586 Delay = Delay + 2; in dscComputeDelay()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c57 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)
267 unsigned int k,
704 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
710 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
714 pixelsPerClock = 2; in dscceComputeDelay()
718 pixelsPerClock = 2; in dscceComputeDelay()
745 wx = (w + 2) / 3; in dscceComputeDelay()
749 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
757 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
768 Delay = Delay + 2; in dscComputeDelay()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c56 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)
255 unsigned int k,
683 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
689 // N422/N420 operate at 2 pixels per clock in dscceComputeDelay()
693 pixelsPerClock = 2; in dscceComputeDelay()
697 pixelsPerClock = 2; in dscceComputeDelay()
724 wx = (w + 2) / 3; in dscceComputeDelay()
728 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
736 //dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels in dscceComputeDelay()
747 Delay = Delay + 2; in dscComputeDelay()
[all …]

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