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/openbmc/linux/include/linux/platform_data/
H A Dshmob_drm.h22 SHMOB_DRM_IFACE_RGB8, /* 24bpp, 8:8:8 */
23 SHMOB_DRM_IFACE_RGB9, /* 18bpp, 9:9 */
24 SHMOB_DRM_IFACE_RGB12A, /* 24bpp, 12:12 */
25 SHMOB_DRM_IFACE_RGB12B, /* 12bpp */
26 SHMOB_DRM_IFACE_RGB16, /* 16bpp */
27 SHMOB_DRM_IFACE_RGB18, /* 18bpp */
28 SHMOB_DRM_IFACE_RGB24, /* 24bpp */
29 SHMOB_DRM_IFACE_YUV422, /* 16bpp */
30 SHMOB_DRM_IFACE_SYS8A, /* 24bpp, 8:8:8 */
31 SHMOB_DRM_IFACE_SYS8B, /* 18bpp, 8:8:2 */
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/openbmc/linux/include/video/
H A Dsh_mobile_lcdc.h50 #define LDMT1R_DAPOL (1 << 24)
95 #define LDDWDxR_RSW (1 << 24)
97 #define LDDRDR_RSR (1 << 24)
105 RGB8 = LDMT1R_MIFTYP_RGB8, /* 24bpp, 8:8:8 */
106 RGB9 = LDMT1R_MIFTYP_RGB9, /* 18bpp, 9:9 */
107 RGB12A = LDMT1R_MIFTYP_RGB12A, /* 24bpp, 12:12 */
108 RGB12B = LDMT1R_MIFTYP_RGB12B, /* 12bpp */
109 RGB16 = LDMT1R_MIFTYP_RGB16, /* 16bpp */
110 RGB18 = LDMT1R_MIFTYP_RGB18, /* 18bpp */
111 RGB24 = LDMT1R_MIFTYP_RGB24, /* 24bpp */
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/openbmc/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c179 /* PPS 24 */ in drm_dsc_pps_payload_pack()
320 * For 6bpp, RC Buffer threshold 12 and 13 need a different value in drm_dsc_set_rc_buf_thresh()
342 u8 bpp; member
347 #define DSC_BPP(bpp) ((bpp) << 4) argument
351 * to DSC 1.1 fractional bpp underflow SCR (DSC_v1.1_E1.pdf)
357 .bpp = DSC_BPP(6), .bpc = 8,
367 .bpp = DSC_BPP(8), .bpc = 8,
377 .bpp = DSC_BPP(8), .bpc = 10,
391 .bpp = DSC_BPP(8), .bpc = 12,
402 .bpp = DSC_BPP(10), .bpc = 8,
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/openbmc/linux/drivers/gpu/drm/renesas/shmobile/
H A Dshmob_drm_kms.c29 .bpp = 16,
34 .bpp = 24,
39 .bpp = 32,
44 .bpp = 32,
49 .bpp = 12,
54 .bpp = 12,
59 .bpp = 16,
64 .bpp = 16,
69 .bpp = 24,
74 .bpp = 24,
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/openbmc/linux/drivers/video/fbdev/matrox/
H A Dmatroxfb_DAC1064.h67 #define M1064_XMULCTRL_DEPTH_8BPP 0x00 /* 8 bpp paletized */
68 #define M1064_XMULCTRL_DEPTH_15BPP_1BPP 0x01 /* 15 bpp paletized + 1 bpp overlay */
69 #define M1064_XMULCTRL_DEPTH_16BPP 0x02 /* 16 bpp paletized */
70 #define M1064_XMULCTRL_DEPTH_24BPP 0x03 /* 24 bpp paletized */
71 #define M1064_XMULCTRL_DEPTH_24BPP_8BPP 0x04 /* 24 bpp direct + 8 bpp overlay paletized */
72 #define M1064_XMULCTRL_2G8V16 0x05 /* 15 bpp video direct, half xres, 8bpp paletized */
73 #define M1064_XMULCTRL_G16V16 0x06 /* 15 bpp video, 15bpp graphics, one of them paletized */
74 #define M1064_XMULCTRL_DEPTH_32BPP 0x07 /* 24 bpp paletized + 8 bpp unused */
/openbmc/linux/Documentation/fb/
H A Dmatroxfb.rst46 bpp 640x400 640x480 768x576 800x600 960x720
52 24 0x1B2 0x184 0x1B5 0x18C
61 bpp 1024x768 1152x864 1280x1024 1408x1056 1600x1200
67 24 0x1B8 0x194 0x1BB 0x19C 0x1BF
94 architectures there are some glitches for 24bpp videomodes. 8, 16 and 32bpp
197 inv24 change timings parameters for 24bpp modes on Millennium and
219 4bpp, 8bpp). In DIRECTCOLOR modes it is limited to characters
252 has 8bpp support. Otherwise first available of 640x350x4bpp,
285 depth:X Bits per pixel: 0=text, 4,8,15,16,24 or 32. Default depends on
316 - 24bpp does not support correctly XF-FBDev on big-endian architectures.
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H A Ds3fb.rst26 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
27 * 8 bpp pseudocolor mode (with 18bit palette)
28 * 16 bpp truecolor modes (RGB 555 and RGB 565)
29 * 24 bpp truecolor mode (RGB 888) on (only on Virge VX)
30 * 32 bpp truecolor mode (RGB 888) on (not on Virge VX)
31 * text mode (activated by bpp = 0)
45 There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
62 * 24 bpp mode support on more cards
63 * support for fontwidths != 8 in 4 bpp modes
H A Dpxafb.rst21 mode:XRESxYRES[-BPP]
29 BPP == The bit depth. Valid values are 1, 2, 4, 8 and 16.
104 var->xres_virtual * var->yres_virtual * bpp
106 bpp = 16 -- for RGB565 or RGBT555
108 bpp = 24 -- for YUV444 packed
110 bpp = 24 -- for YUV444 planar
112 bpp = 16 -- for YUV422 planar (1 pixel = 1 Y + 1/2 Cb + 1/2 Cr)
114 bpp = 12 -- for YUV420 planar (1 pixel = 1 Y + 1/4 Cb + 1/4 Cr)
H A Darkfb.rst19 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
20 * 8 bpp pseudocolor mode (with 18bit palette)
21 * 16 bpp truecolor modes (RGB 555 and RGB 565)
22 * 24 bpp truecolor mode (RGB 888)
23 * 32 bpp truecolor mode (RGB 888)
24 * text mode (activated by bpp = 0)
36 There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
54 * support for fontwidths != 8 in 4 bpp modes
/openbmc/qemu/include/ui/
H A Dpixman-minimal.h53 #define PIXMAN_FORMAT(bpp, type, a, r, g, b) (((bpp) << 24) | \ argument
63 #define PIXMAN_FORMAT_BPP(f) PIXMAN_FORMAT_RESHIFT(f, 24, 8)
75 /* 32bpp formats */
84 /* 24bpp formats */
85 PIXMAN_r8g8b8 = PIXMAN_FORMAT(24, PIXMAN_TYPE_ARGB, 0, 8, 8, 8),
86 PIXMAN_b8g8r8 = PIXMAN_FORMAT(24, PIXMAN_TYPE_ABGR, 0, 8, 8, 8),
87 /* 16bpp formats */
123 int bpp = PIXMAN_FORMAT_BPP(format); in create_bits() local
127 * stride = ((width * bpp + 0x1f) >> 5) * sizeof(uint32_t); in create_bits()
130 if (unlikely(__builtin_mul_overflow(width, bpp, &stride))) { in create_bits()
/openbmc/qemu/ui/
H A Dqemu-pixman.c16 uint8_t bpp; in qemu_pixelformat_from_pixman() local
18 bpp = pf.bits_per_pixel = PIXMAN_FORMAT_BPP(format); in qemu_pixelformat_from_pixman()
41 pf.bshift = bpp - pf.bbits; in qemu_pixelformat_from_pixman()
42 pf.gshift = bpp - (pf.bbits + pf.gbits); in qemu_pixelformat_from_pixman()
43 pf.rshift = bpp - (pf.bbits + pf.gbits + pf.rbits); in qemu_pixelformat_from_pixman()
47 pf.rshift = bpp - pf.rbits; in qemu_pixelformat_from_pixman()
48 pf.gshift = bpp - (pf.rbits + pf.gbits); in qemu_pixelformat_from_pixman()
49 pf.bshift = bpp - (pf.rbits + pf.gbits + pf.bbits); in qemu_pixelformat_from_pixman()
68 pixman_format_code_t qemu_default_pixman_format(int bpp, bool native_endian) in qemu_default_pixman_format() argument
71 switch (bpp) { in qemu_default_pixman_format()
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/openbmc/qemu/hw/display/
H A Dati_2d.c36 return 24; in ati_bpp_from_datatype()
61 int bpp = ati_bpp_from_datatype(s); in ati_2d_blt() local
62 if (!bpp) { in ati_2d_blt()
63 qemu_log_mask(LOG_GUEST_ERROR, "Invalid bpp\n"); in ati_2d_blt()
76 dst_stride *= bpp; in ati_2d_blt()
111 src_stride *= bpp; in ati_2d_blt()
123 src_bits, dst_bits, src_stride, dst_stride, bpp, bpp, in ati_2d_blt()
131 src_stride, dst_stride, bpp, bpp, in ati_2d_blt()
136 int llb = s->regs.dst_width * (bpp / 8); in ati_2d_blt()
141 src_stride, tmp_stride, bpp, bpp, in ati_2d_blt()
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/openbmc/u-boot/drivers/video/
H A Dmxsfb.c45 * video=ctfb:x:800,y:480,depth:24,mode:0,pclk:29851,
50 struct ctfb_res_modes *mode, int bpp) in mxs_lcd_init() argument
62 switch (bpp) { in mxs_lcd_init()
63 case 24: in mxs_lcd_init()
155 int bpp = -1; in video_hw_init() local
169 bpp = video_get_params(&mode, penv); in video_hw_init()
173 mode.xres, mode.yres, bpp); in video_hw_init()
180 switch (bpp) { in video_hw_init()
181 case 24: in video_hw_init()
195 printf("MXSFB: Invalid BPP specified! (bpp = %i)\n", bpp); in video_hw_init()
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H A Dda8xx-fb.c79 #define LCD_STN_565_ENABLE (1 << 24)
91 #define LCD_SYNC_EDGE (1 << 24)
394 reg |= ((back_porch & 0xff) << 24) in lcd_cfg_horizontal_sync()
406 reg |= ((back_porch & 0xff) << 24) in lcd_cfg_vertical_sync()
481 u32 bpp, u32 raster_order) in lcd_cfg_frame_buffer() argument
528 if (bpp == 24) in lcd_cfg_frame_buffer()
530 else if (bpp == 32) in lcd_cfg_frame_buffer()
536 switch (bpp) { in lcd_cfg_frame_buffer()
541 case 24: in lcd_cfg_frame_buffer()
602 ((info->var.bits_per_pixel == 24) && regno < 24)) { in fb_setcolreg()
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H A Dati_radeon_fb.c46 #define SURF_UPPER_BOUND(x,y,bpp) (((((x) * (((y) + 15) & ~15) * (bpp)/8) + RADEON_BUFFER_ALIGN) \ argument
48 #define RADEON_CRT_PITCH(width, bpp) ((((width) * (bpp) + ((bpp) * 8 - 1)) / ((bpp) * 8)) | \ argument
49 ((((width) * (bpp) + ((bpp) * 8 - 1)) / ((bpp) * 8)) << 16))
359 void radeon_setmode_9200(int vesa_idx, int bpp) in radeon_setmode_9200() argument
368 switch (bpp) { in radeon_setmode_9200()
369 case 24: in radeon_setmode_9200()
402 * for this mode pitch expands to the same value for 32, 16 and 8 bpp, in radeon_setmode_9200()
406 switch (bpp) { in radeon_setmode_9200()
407 case 24: in radeon_setmode_9200()
415 default: /* 8 bpp */ in radeon_setmode_9200()
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/openbmc/linux/drivers/video/fbdev/core/
H A Dfb_draw.h26 pixel_to_pat( u32 bpp, u32 pixel) in pixel_to_pat() argument
28 switch (bpp) { in pixel_to_pat()
41 case 24: in pixel_to_pat()
46 WARN(1, "pixel_to_pat(): unsupported pixelformat %d\n", bpp); in pixel_to_pat()
52 pixel_to_pat( u32 bpp, u32 pixel) in pixel_to_pat() argument
54 switch (bpp) { in pixel_to_pat()
67 case 24: in pixel_to_pat()
72 WARN(1, "pixel_to_pat(): unsupported pixelformat %d\n", bpp); in pixel_to_pat()
148 unsigned bpp = info->var.bits_per_pixel; in fb_compute_bswapmask() local
150 if ((bpp < 8) && (info->var.nonstd & FB_NONSTD_REV_PIX_IN_B)) { in fb_compute_bswapmask()
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/openbmc/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_du_kms.c45 .bpp = 16,
53 .bpp = 16,
61 .bpp = 16,
68 .bpp = 32,
76 .bpp = 32,
84 .bpp = 16,
92 .bpp = 16,
100 .bpp = 12,
108 .bpp = 12,
116 .bpp = 16,
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/openbmc/linux/drivers/video/fbdev/aty/
H A Dmach64_accel.c76 if (info->var.bits_per_pixel == 24) { in aty_init_engine()
77 /* In 24 bpp, the engine is in 8 bpp - this requires that all */ in aty_init_engine()
214 if (info->var.bits_per_pixel == 24) { in atyfb_copyarea()
215 /* In 24 bpp, the engine is in 8 bpp - this requires that all */ in atyfb_copyarea()
234 if (info->var.bits_per_pixel == 24) { in atyfb_copyarea()
267 if (info->var.bits_per_pixel == 24) { in atyfb_fillrect()
268 /* In 24 bpp, the engine is in 8 bpp - this requires that all */ in atyfb_fillrect()
326 case 24: in atyfb_imageblit()
336 if (info->var.bits_per_pixel == 24) { in atyfb_imageblit()
337 /* In 24 bpp, the engine is in 8 bpp - this requires that all */ in atyfb_imageblit()
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H A Dmach64_gx.c81 const union aty_pll *pll, u32 bpp, u32 accel) in aty_set_dac_514() argument
92 0, 0x41, 0x03, 0x71, 0x45}, /* 8 bpp */ in aty_set_dac_514()
100 switch (bpp) { in aty_set_dac_514()
119 /* Misc Control 2 / 16 BPP Control / 32 BPP Control */ in aty_set_dac_514()
124 u32 bpp, union aty_pll *pll) in aty_var_to_pll_514() argument
206 const union aty_pll *pll, u32 bpp, in aty_set_dac_ATI68860_B() argument
215 switch (bpp) { in aty_set_dac_ATI68860_B()
229 case 24: in aty_set_dac_ATI68860_B()
289 const union aty_pll *pll, u32 bpp, in aty_set_dac_ATT21C498() argument
299 switch (bpp) { in aty_set_dac_ATT21C498()
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/openbmc/linux/drivers/gpu/drm/tests/
H A Ddrm_cmdline_parser_test.c204 const char *cmdline = "720x480-24"; in drm_test_cmdline_res_bpp()
215 KUNIT_EXPECT_EQ(test, mode.bpp, 24); in drm_test_cmdline_res_bpp()
250 const char *cmdline = "720x480-24@60"; in drm_test_cmdline_res_bpp_refresh()
262 KUNIT_EXPECT_EQ(test, mode.bpp, 24); in drm_test_cmdline_res_bpp_refresh()
274 const char *cmdline = "720x480-24@60i"; in drm_test_cmdline_res_bpp_refresh_interlaced()
286 KUNIT_EXPECT_EQ(test, mode.bpp, 24); in drm_test_cmdline_res_bpp_refresh_interlaced()
298 const char *cmdline = "720x480-24@60m"; in drm_test_cmdline_res_bpp_refresh_margins()
310 KUNIT_EXPECT_EQ(test, mode.bpp, 24); in drm_test_cmdline_res_bpp_refresh_margins()
322 const char *cmdline = "720x480-24@60d"; in drm_test_cmdline_res_bpp_refresh_force_off()
334 KUNIT_EXPECT_EQ(test, mode.bpp, 24); in drm_test_cmdline_res_bpp_refresh_force_off()
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H A Ddrm_dp_mst_helper_test.c17 const int bpp; member
25 .bpp = 30,
31 .bpp = 30,
37 .bpp = 24,
43 .bpp = 24,
49 .bpp = 24,
59 KUNIT_EXPECT_EQ(test, drm_dp_calc_pbn_mode(params->clock, params->bpp << 4), in drm_test_dp_mst_calc_pbn_mode()
65 sprintf(desc, "Clock %d BPP %d DSC %s", t->clock, t->bpp, t->dsc ? "enabled" : "disabled"); in dp_mst_calc_pbn_mode_desc()
/openbmc/linux/drivers/video/fbdev/
H A Dtridentfb.c65 static int bpp = 8; variable
83 module_param(bpp, int, 0);
306 static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp) in blade_init_accel() argument
309 int tmp = bpp == 24 ? 2 : (bpp >> 4); in blade_init_accel()
380 static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp) in xp_init_accel() argument
382 unsigned char x = bpp == 24 ? 3 : (bpp >> 4); in xp_init_accel()
383 int v1 = pitch << (bpp == 24 ? 20 : (18 + x)); in xp_init_accel()
385 switch (pitch << (bpp >> 3)) { in xp_init_accel()
478 static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp) in image_init_accel() argument
480 int tmp = bpp == 24 ? 2: (bpp >> 4); in image_init_accel()
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/openbmc/linux/drivers/gpu/drm/gma500/
H A Dfbdev.c86 case 24: in psb_fbdev_fb_setcolreg()
163 u32 bpp, depth; in psb_fbdev_fb_probe() local
165 /* No 24-bit packed mode */ in psb_fbdev_fb_probe()
166 if (sizes->surface_bpp == 24) { in psb_fbdev_fb_probe()
168 sizes->surface_depth = 24; in psb_fbdev_fb_probe()
170 bpp = sizes->surface_bpp; in psb_fbdev_fb_probe()
178 size = ALIGN(sizes->surface_width * DIV_ROUND_UP(bpp, 8), 64) * in psb_fbdev_fb_probe()
186 bpp = sizes->surface_bpp; in psb_fbdev_fb_probe()
191 mode_cmd.pitches[0] = ALIGN(mode_cmd.width * DIV_ROUND_UP(bpp, 8), 64); in psb_fbdev_fb_probe()
192 mode_cmd.pixel_format = drm_mode_legacy_fb_format(bpp, depth); in psb_fbdev_fb_probe()
/openbmc/linux/arch/arm/mach-s3c/
H A Dfb.h25 * s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD
27 * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dsc_1_2.c95 u32 bpp; in dpu_hw_dsc_config_1_2() local
135 bpp = dsc->bits_per_pixel; in dpu_hw_dsc_config_1_2()
136 /* as per hw requirement bpp should be programmed in dpu_hw_dsc_config_1_2()
140 bpp = 2 * bpp; in dpu_hw_dsc_config_1_2()
142 data |= bpp << 10; in dpu_hw_dsc_config_1_2()
215 data |= (dsc->rc_tgt_offset_low & 0xf) << 24; in dpu_hw_dsc_config_1_2()
264 (dsc->rc_buf_thresh[3] << 24)); in dpu_hw_dsc_config_thresh_1_2()
269 (dsc->rc_buf_thresh[7] << 24)); in dpu_hw_dsc_config_thresh_1_2()
274 (dsc->rc_buf_thresh[11] << 24)); in dpu_hw_dsc_config_thresh_1_2()
303 (rc[4].range_bpg_offset << 24)); in dpu_hw_dsc_config_thresh_1_2()
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