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/openbmc/linux/include/linux/
H A Dinet.h12 * $Id: Space.c,v 0.8.4.5 1992/12/12 19:25:04 bir7 Exp $
13 * $Id: arp.c,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $
14 * $Id: arp.h,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $
15 * $Id: dev.c,v 0.8.4.13 1993/01/23 18:00:11 bir7 Exp $
16 * $Id: dev.h,v 0.8.4.7 1993/01/23 18:00:11 bir7 Exp $
17 * $Id: eth.c,v 0.8.4.4 1993/01/22 23:21:38 bir7 Exp $
18 * $Id: eth.h,v 0.8.4.1 1992/11/10 00:17:18 bir7 Exp $
19 * $Id: icmp.c,v 0.8.4.9 1993/01/23 18:00:11 bir7 Exp $
20 * $Id: icmp.h,v 0.8.4.2 1992/11/15 14:55:30 bir7 Exp $
21 * $Id: ip.c,v 0.8.4.8 1992/12/12 19:25:04 bir7 Exp $
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx5/
H A Dcrm_regs.h80 #define MXC_CCM_CCR_OSCNT(v) ((v) & 0xFF) argument
92 #define MXC_CCM_CCSR_STEP_SEL(v) (((v) & 0x3) << 7) argument
96 #define MXC_CCM_CCSR_PLL2_DIV_PODF(v) (((v) & 0x3) << 5) argument
100 #define MXC_CCM_CCSR_PLL3_DIV_PODF(v) (((v) & 0x3) << 3) argument
109 #define MXC_CCM_CACRR_ARM_PODF(v) ((v) & 0x7) argument
116 #define MXC_CCM_CBCDR_DDR_PODF(v) (((v) & 0x7) << 27) argument
120 #define MXC_CCM_CBCDR_EMI_PODF_OFFSET 22
121 #define MXC_CCM_CBCDR_EMI_PODF_MASK (0x7 << 22)
122 #define MXC_CCM_CBCDR_EMI_PODF(v) (((v) & 0x7) << 22) argument
123 #define MXC_CCM_CBCDR_EMI_PODF_RD(r) (((r) >> 22) & 0x7)
[all …]
/openbmc/openbmc-test-automation/docs/
H A Dcode_update.md20 …$ robot -v OPENBMC_HOST:x.x.x.x -v IMAGE_FILE_PATH:<image path>/obmc-phosphor-image-witherspoon.ub…
25 …$ robot -v OPENBMC_HOST:x.x.x.x -v IMAGE_FILE_PATH:<image path>/obmc-phosphor-image-witherspoon.ub…
37 …$ robot -v OPENBMC_HOST:x.x.x.x -v IMAGE_FILE_PATH:<image path>/witherspoon.pnor.squashfs.tar --in…
42 …$ robot -v OPENBMC_HOST:x.x.x.x -v IMAGE_FILE_PATH:<image path>/witherspoon.pnor.squashfs.tar --in…
60 …$ robot -v OPENBMC_HOST:x.x.x.x -v IMAGE_FILE_PATH:<image path>/obmc-phosphor-image-witherspoon.ub…
70 …$ robot -v OPENBMC_HOST:x.x.x.x -v IMAGE_FILE_PATH:<image path>/witherspoon.pnor.squashfs.tar --in…
82 …$ robot -v OPENBMC_HOST:x.x.x.x -v FILE_PATH:<image path>/zaius-<date time>.all.tar --include Init…
92 $ robot -v OPENBMC_HOST:x.x.x.x -v PNOR_IMAGE_PATH:<image path>/zaius.pnor test_bios_update.robot
106 -rw-r--r-- jenkins-op/jenkins-op 306804 2021-05-15 22:00 image-u-boot
108 -rw-r--r-- jenkins-op/jenkins-op 19861504 2021-05-15 22:00 image-rofs
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dcrm_regs.h359 #define MXC_CCM_CSCDR1_GPMI_PODF_MASK (0x7 << 22)
360 #define MXC_CCM_CSCDR1_GPMI_PODF_OFFSET 22
364 #define MXC_CCM_CSCDR1_USDHC4_PODF_MASK (0x7 << 22)
365 #define MXC_CCM_CSCDR1_USDHC4_PODF_OFFSET 22
385 #define MXC_CCM_CS1CDR_SAI3_CLK_PRED_MASK (0x7 << 22)
386 #define MXC_CCM_CS1CDR_SAI3_CLK_PRED_OFFSET 22
396 #define MXC_CCM_CS1CDR_SSI3_CLK_PRED_MASK (0x7 << 22)
397 #define MXC_CCM_CS1CDR_SSI3_CLK_PRED_OFFSET 22
411 #define MXC_CCM_CS2CDR_QSPI2_CLK_PODF(v) (((v) & 0x3f) << 21) argument
414 #define MXC_CCM_CS2CDR_QSPI2_CLK_PRED(v) (((v) & 0x7) << 18) argument
[all …]
/openbmc/linux/drivers/clk/versatile/
H A Dclk-icst.c74 * bits of the v PLL divider. Bit 8 is tied low and always zero, in vco_get()
75 * r is hardwired to 22 and output divider s is hardwired to 1 in vco_get()
81 vco->v = val & INTEGRATOR_AP_CM_BITS; in vco_get()
82 vco->r = 22; in vco_get()
89 * access the low eight bits of the v PLL divider. Bit 8 is tied low in vco_get()
96 vco->v = val & INTEGRATOR_AP_SYS_BITS; in vco_get()
106 * bit to 0 yields v = 17, r = 22 and OD = 1, whereas setting the in vco_get()
107 * bit to 1 yields v = 14, r = 14 and OD = 1 giving the frequencies in vco_get()
113 vco->v = divxy ? 17 : 14; in vco_get()
114 vco->r = divxy ? 22 : 14; in vco_get()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-vf610/
H A Dcrm_regs.h118 #define CCM_CCR_OSCNT(v) ((v) & 0xff) argument
122 #define CCM_CCSR_PLL2_PFD_CLK_SEL(v) (((v) & 0x7) << 19) argument
126 #define CCM_CCSR_PLL1_PFD_CLK_SEL(v) (((v) & 0x7) << 16) argument
137 #define CCM_CCSR_DDRC_CLK_SEL(v) ((v) << 6) argument
138 #define CCM_CCSR_FAST_CLK_SEL(v) ((v) << 5) argument
142 #define CCM_CCSR_SYS_CLK_SEL(v) ((v) & 0x7) argument
146 #define CCM_CACRR_IPG_CLK_DIV(v) (((v) & 0x3) << 11) argument
149 #define CCM_CACRR_BUS_CLK_DIV(v) (((v) & 0x7) << 3) argument
152 #define CCM_CACRR_ARM_CLK_DIV(v) ((v) & 0x7) argument
157 #define CCM_CSCMR1_QSPI0_CLK_SEL_OFFSET 22
[all …]
/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/fonts/
H A Dfontawesome-webfont.svg34 <glyph unicode="&#xf000;" horiz-adv-x="1792" d="M1699 1350q0 -35 -43 -78l-632 -632v-768h320q26 0 45…
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37v-768q0 -13 9.5 -22.5t22.5 -9.5h1472q13 0 22.5 9.5t9.5 22.5zM1664 1083v11v13.5t-0.5 13 t-3 12.5t-5…
39 …="1664" d="M1664 889q0 -22 -26 -48l-363 -354l86 -500q1 -7 1 -20q0 -21 -10.5 -35.5t-30.5 -14.5q-19 …
40 …1l378 199l377 -199zM1664 889q0 -22 -26 -48l-363 -354l86 -500q1 -7 1 -20q0 -50 -41 -50q-19 0 -40 12…
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44v-192q0 -40 -28 -68t-68 -28h-320q-40 0 -68 28t-28 68v192q0 40 28 68t68 28h320q40 0 68 -28t28 -68zM…
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[all …]
H A Dglyphicons-halflings-regular.svg12v-224l158 158q7 7 18 8t19 -6l106 -106q7 -8 6 -19t-8 -18l-158 -158h224q10 0 18.5 -7.5t10.5 -17.5q6 …
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15 … 13 -6t-3 -14l-120 -160q-6 -8 -18 -14t-22 -6h-125v-100h275q10 0 13 -6t-3 -14l-120 -160q-6 -8 -18 -…
30v-16.5v-16.5q0 -36 -0.5 -57t-6.5 -61t-17 -65t-35 -57t-57 -50.5t-86 -31.5t-120 -13h-178l-2 -100h288…
31 <glyph unicode="&#x2212;" d="M250 700h800q21 0 35.5 -14.5t14.5 -35.5v-200q0 -21 -14.5 -35.5t-35.5 -…
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35v-42h-1200v42q0 21 15 39.5t35 18.5h30l468 746l-135 183q-10 16 -5.5 34t20.5 28t34 5.5t28 -20.5l111 …
36 …-13 -5.5t-5 12.5v550q0 10 5 12.5t13 -5.5zM918 618l264 264q8 8 13 5.5t5 -12.5v-550q0 -10 -5 -12.5t-…
38 <glyph unicode="&#xe001;" d="M700 650v-550h250q21 0 35.5 -14.5t14.5 -35.5v-50h-800v50q0 21 14.5 35.…
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/openbmc/linux/tools/testing/selftests/net/forwarding/
H A Drouter_multicast.sh5 # | H1 (v$h1) |
24 # | H2 (v$h2) | | | H3 (v$h3) | |
44 ip route add 198.51.100.16/28 vrf v$h1 nexthop via 198.51.100.1
45 ip route add 198.51.100.32/28 vrf v$h1 nexthop via 198.51.100.1
47 ip route add 2001:db8:2::/64 vrf v$h1 nexthop via 2001:db8:1::1
48 ip route add 2001:db8:3::/64 vrf v$h1 nexthop via 2001:db8:1::1
57 ip route del 2001:db8:3::/64 vrf v$h1
58 ip route del 2001:db8:2::/64 vrf v$h1
60 ip route del 198.51.100.32/28 vrf v$h1
61 ip route del 198.51.100.16/28 vrf v$h1
[all …]
/openbmc/linux/arch/nios2/kernel/
H A Dmodule.c64 uint32_t v = sym->st_value + rela[i].r_addend; in apply_relocate_add() local
74 *loc += v; in apply_relocate_add()
77 v -= (uint32_t)loc + 4; in apply_relocate_add()
78 if ((int32_t)v > 0x7fff || in apply_relocate_add()
79 (int32_t)v < -(int32_t)0x8000) { in apply_relocate_add()
85 *loc = ((((word >> 22) << 16) | (v & 0xffff)) << 6) | in apply_relocate_add()
89 if (v & 3) { in apply_relocate_add()
94 if ((v >> 28) != ((uint32_t)loc >> 28)) { in apply_relocate_add()
99 *loc = (*loc & 0x3f) | ((v >> 2) << 6); in apply_relocate_add()
103 *loc = ((((word >> 22) << 16) | in apply_relocate_add()
[all …]
/openbmc/linux/arch/alpha/kernel/
H A Dentry.S72 stq $22, 96($sp)
89 .cfi_rel_offset $22, 96
118 ldq $22, 96($sp)
138 .cfi_restore $22
276 stq $22, 176($sp)
303 .cfi_rel_offset $22, 22*8
335 ldq $22, 176($sp)
362 .cfi_restore $22
687 #define V(n) stt $f##n, FR(n) macro
688 V( 0); V( 1); V( 2); V( 3)
[all …]
/openbmc/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
38 #define VE_MODE_PIC_WIDTH_IS_4096 BIT(22)
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument
107 ((v) ? BIT(6) : 0)
108 #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ argument
109 ((v) ? BIT(5) : 0)
110 #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ argument
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dsiul.h50 #define SIUL2_MSCR_DDR_DO_TRIM(v) ((v) & 0xC0000000) argument
56 #define SIUL2_MSCR_DDR_INPUT(v) ((v) & 0x20000000) argument
60 #define SIUL2_MSCR_DDR_SEL(v) ((v) & 0x18000000) argument
64 #define SIUL2_MSCR_DDR_ODT(v) ((v) & 0x07000000) argument
73 #define SIUL2_MSCR_DCYCLE_TRIM(v) ((v) & 0x00C00000) argument
74 #define SIUL2_MSCR_DCYCLE_TRIM_NONE (0 << 22)
75 #define SIUL2_MSCR_DCYCLE_TRIM_LEFT (1 << 22)
76 #define SIUL2_MSCR_DCYCLE_TRIM_RIGHT (2 << 22)
78 #define SIUL2_MSCR_OBE(v) ((v) & 0x00200000) argument
81 #define SIUL2_MSCR_ODE(v) ((v) & 0x00100000) argument
[all …]
/openbmc/linux/include/linux/spi/
H A Dmxs-spi.h26 #define BP_SSP_CTRL0_BUS_WIDTH 22
27 #define BM_SSP_CTRL0_BUS_WIDTH (0x3 << 22)
37 #define BM_SSP_CMD0_SLOW_CLKING_EN (1 << 22)
58 #define BF_SSP_TIMING_CLOCK_DIVIDE(v) \ argument
59 (((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE)
62 #define BF_SSP_TIMING_CLOCK_RATE(v) \ argument
63 (((v) << 0) & BM_SSP_TIMING_CLOCK_RATE)
74 #define BM_SSP_CTRL1_DATA_CRC_IRQ_EN (1 << 22)
86 #define BF_SSP_CTRL1_WORD_LENGTH(v) \ argument
87 (((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH)
[all …]
/openbmc/linux/drivers/comedi/drivers/
H A Ddac02.c35 * 0 to 5V 0 21 to 22 24
37 * 0 to 10V 0 20 to 22 24
39 * +/-5V 0 21 to 22 23
41 * +/-10V 0 20 to 22 23
43 * 4 to 20mA 0 21 to 22 25
45 * AC reference 0 In on pin 22 24 (2-quadrant)
46 * In on pin 22 23 (4-quadrant)
/openbmc/linux/drivers/media/platform/verisilicon/
H A Dhantro_g1_regs.h30 #define G1_REG_CONFIG_DEC_STRSWAP32_E BIT(22)
53 #define G1_REG_DEC_CTRL0_PIC_FIELDMODE_E BIT(22)
95 #define G1_REG_DEC_CTRL2_RANGE_RED_FRM_E BIT(22)
252 #define G1_REG_REF_PIC_QUANT_DELTA_1(x) (((x) & 0x1f) << 22)
273 #define G1_REG_BD_REF_PIC_QUANT_DELTA_3(x) (((x) & 0x1f) << 22)
288 #define G1_REG_PRED_FLT_PRED_BC_TAP_0_0(x) (((x) & 0x3ff) << 22)
313 #define G1_REG_PP_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
314 #define G1_REG_PP_AXI_WR_ID(v) (((v) << 16) & GENMASK(23, 16)) argument
315 #define G1_REG_PP_INSWAP32_E(v) ((v) ? BIT(10) : 0) argument
316 #define G1_REG_PP_DATA_DISC_E(v) ((v) ? BIT(9) : 0) argument
[all …]
H A Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
H A Dhantro_g1_mpeg2_dec.c25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument
33 #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) argument
34 #define G1_REG_DEC_IN_ENDIAN(v) ((v) ? BIT(9) : 0) argument
[all …]
/openbmc/linux/Documentation/fb/
H A Dviafb.modes29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
116 # D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz
133 # 22 chars 18 lines
137 # D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz
158 # D: 29.500 MHz, H: 29.738 kHz, V: 60.00 Hz
179 # D: 32.668 MHz, H: 35.820 kHz, V: 60.00 Hz
[all …]
/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Drif_mac_profiles.sh17 ip route add 198.51.100.0/24 vrf v$h1 nexthop via 192.0.2.2
26 ip route del 198.51.100.0/24 vrf v$h1
33 ip route add 192.0.2.0/24 vrf v$h2 nexthop via 198.51.100.2
42 ip route del 192.0.2.0/24 vrf v$h2
192 ip link set dev $rp2 addr 00:11:22:33:44:55
196 ip link set dev $rp2 address 00:22:22:22:22:22
/openbmc/linux/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
H A Dsun8i_a83t_mipi_csi2_reg.h30 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT2 BIT(22)
55 #define SUN8I_A83T_MIPI_CSI2_INT_STA1_LINE_SEQ_ERR_DT6 BIT(22)
85 #define SUN8I_A83T_MIPI_CSI2_INT_MSK0_LINE_SEQ_ERR_DT2 BIT(22)
134 #define SUN8I_A83T_MIPI_CSI2_CFG_SYNC_DLY_CYCLE(v) (((v) << 18) & \ argument
135 GENMASK(22, 18))
136 #define SUN8I_A83T_MIPI_CSI2_CFG_N_CHANNEL(v) ((((v) - 1) << 16) & \ argument
138 #define SUN8I_A83T_MIPI_CSI2_CFG_N_LANE(v) ((((v) - 1) << 4) & \ argument
/openbmc/linux/drivers/gpu/drm/exynos/
H A Dregs-scaler.h151 #define SCALER_INT_EN_ILLEGAL_DST_HEIGHT (1 << 22)
179 #define SCALER_INT_STATUS_ILLEGAL_DST_HEIGHT (1 << 22)
206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
227 #define SCALER_YUV422_3P 22
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
234 #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) argument
238 #define SCALER_SRC_Y_POS_SET_YH_POS(v) SCALER_SET(v, 31, 16) argument
240 #define SCALER_SRC_Y_POS_SET_YV_POS(v) SCALER_SET(v, 15, 0) argument
244 #define SCALER_SRC_WH_SET_WIDTH(v) SCALER_SET(v, 29, 16) argument
[all …]
/openbmc/linux/sound/soc/qcom/
H A Dlpass-sc7280.c113 struct lpass_variant *v = drvdata->variant; in sc7280_lpass_alloc_dma_channel() local
120 v->rdma_channels); in sc7280_lpass_alloc_dma_channel()
122 if (chan >= v->rdma_channels) in sc7280_lpass_alloc_dma_channel()
126 v->wrdma_channel_start + in sc7280_lpass_alloc_dma_channel()
127 v->wrdma_channels, in sc7280_lpass_alloc_dma_channel()
128 v->wrdma_channel_start); in sc7280_lpass_alloc_dma_channel()
130 if (chan >= v->wrdma_channel_start + v->wrdma_channels) in sc7280_lpass_alloc_dma_channel()
137 v->hdmi_rdma_channels); in sc7280_lpass_alloc_dma_channel()
138 if (chan >= v->hdmi_rdma_channels) in sc7280_lpass_alloc_dma_channel()
144 v->rxtx_rdma_channels); in sc7280_lpass_alloc_dma_channel()
[all …]
/openbmc/phosphor-webui/app/assets/icons/
H A Dicon-avatar.svg1 … 2zm-6 24.38v-2A3.22 3.22 0 0113 21h6a3.22 3.22 0 013 3.39v2a11.92 11.92 0 01-12 0zm14-1.46v-.61A5…
/openbmc/linux/drivers/mtd/nand/raw/gpmi-nand/
H A Dgpmi-regs.h18 #define BF_GPMI_CTRL0_COMMAND_MODE(v) \ argument
19 (((v) << BP_GPMI_CTRL0_COMMAND_MODE) & BM_GPMI_CTRL0_COMMAND_MODE)
34 #define MX23_BP_GPMI_CTRL0_LOCK_CS 22
37 #define BF_GPMI_CTRL0_LOCK_CS(v, x) 0x0 argument
43 #define BF_GPMI_CTRL0_CS(v, x) (((v) << BP_GPMI_CTRL0_CS) & \ argument
50 #define BF_GPMI_CTRL0_ADDRESS(v) \ argument
51 (((v) << BP_GPMI_CTRL0_ADDRESS) & BM_GPMI_CTRL0_ADDRESS)
62 #define BF_GPMI_CTRL0_XFER_COUNT(v) \ argument
63 (((v) << BP_GPMI_CTRL0_XFER_COUNT) & BM_GPMI_CTRL0_XFER_COUNT)
74 #define BF_GPMI_ECCCTRL_ECC_CMD(v) \ argument
[all …]

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