Searched +full:1 +full:e600000 (Results 1 – 7 of 7) sorted by relevance
8 #address-cells = <1>;14 fsl,cpm-command = <2e600000>;
24 maxItems: 134 ahbc@1e600000 {
45 - compatible : Shall be "apm,xgene-edac-soc-v1" for revision 1 or103 edacl3@7e600000 {
25 #clock-cells = <1>;28 cpu@1 {35 #clock-cells = <1>;45 #clock-cells = <1>;55 #clock-cells = <1>;65 #clock-cells = <1>;75 #clock-cells = <1>;85 #clock-cells = <1>;95 #clock-cells = <1>;103 xgene_L2_1: l2-cache-1 {[all …]
26 cpu@1 {87 xgene_L2_1: l2-cache-1 {112 interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */117 interrupts = <1 0 0xff08>, /* Secure Phys IRQ */118 <1 13 0xff08>, /* Non-secure Phys IRQ */119 <1 14 0xff08>, /* Virt IRQ */120 <1 15 0xff08>; /* Hyp IRQ */126 interrupts = <1 12 0xff04>;142 #clock-cells = <1>;149 #clock-cells = <1>;[all …]
11 #address-cells = <1>;12 #size-cells = <1>;47 #address-cells = <1>;76 edac: sdram@1e6e0000 {84 #address-cells = <1>;85 #size-cells = <1>;101 ahbc: bus@1e600000 {106 fmc: spi@1e620000 {108 #address-cells = <1>;121 flash@1 {[all …]
9 #address-cells = <1>;10 #size-cells = <1>;46 #address-cells = <1>;56 cpu@1 {59 reg = <1>;74 #address-cells = <1>;75 #size-cells = <1>;95 #address-cells = <1>;96 #size-cells = <1>;112 ahbc: ahbc@1e600000 {[all …]