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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dbrcm,bcm63xx-hsspi.yaml20 use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as
51 - const: brcm,bcmbca-hsspi-v1.0
100 - brcm,bcmbca-hsspi-v1.0
125 reg = <0xff801000 0x1000>,
126 <0xff802610 0x4>;
133 #size-cells = <0>;
/openbmc/u-boot/board/renesas/sh7763rdp/
H A Dlowlevel_init.S27 * 0xFFCC0008
37 write32 MSTPCR0_A, MSTPCR0_D /* Address of Power Control Register 0 */
168 CCR_A: .long 0xFF00001C
169 MMUCR_A: .long 0xFF000010
170 RAMCR_A: .long 0xFF000074
173 MSTPCR0_A: .long 0xFFC80030
174 MSTPCR1_A: .long 0xFFC80038
177 WDTST_A: .long 0xFFCC0000
178 WDTCSR_A: .long 0xFFCC0004
179 WDTBST_A: .long 0xFFCC0008
[all …]
/openbmc/u-boot/board/espt/
H A Dlowlevel_init.S168 PACR_A: .long 0xFFEF0000
169 PBCR_A: .long 0xFFEF0002
170 PCCR_A: .long 0xFFEF0004
171 PDCR_A: .long 0xFFEF0006
172 PECR_A: .long 0xFFEF0008
173 PFCR_A: .long 0xFFEF000A
174 PGCR_A: .long 0xFFEF000C
175 PHCR_A: .long 0xFFEF000E
176 PICR_A: .long 0xFFEF0010
177 PJCR_A: .long 0xFFEF0012
[all …]
/openbmc/linux/arch/sh/kernel/cpu/sh2a/
H A Dsetup-mxg.c15 UNUSED = 0,
86 { 0xfffd9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
87 { 0xfffd941a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
88 { 0xfffd941c, 0, 16, 4, /* IPR03 */ { IRQ8, IRQ9, IRQ10, IRQ11 } },
89 { 0xfffd941e, 0, 16, 4, /* IPR04 */ { IRQ12, IRQ13, IRQ14, IRQ15 } },
90 { 0xfffd9420, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } },
91 { 0xfffd9800, 0, 16, 4, /* IPR06 */ { } },
92 { 0xfffd9802, 0, 16, 4, /* IPR07 */ { } },
93 { 0xfffd9804, 0, 16, 4, /* IPR08 */ { } },
94 { 0xfffd9806, 0, 16, 4, /* IPR09 */ { } },
[all …]
/openbmc/u-boot/arch/sh/include/asm/
H A Dcpu_sh7780.h11 #define CCR_CACHE_INIT 0x0000090b
14 #define TRA 0xFF000020
15 #define EXPEVT 0xFF000024
16 #define INTEVT 0xFF000028
19 #define PTEH 0xFF000000
20 #define PTEL 0xFF000004
21 #define TTB 0xFF000008
22 #define TEA 0xFF00000C
23 #define MMUCR 0xFF000010
24 #define PASCR 0xFF000070
[all …]