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/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dti-pci.txt74 ranges = <0x51000000 0x51000000 0x3000
75 0x0 0x20000000 0x10000000>;
78 reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
80 interrupts = <0 232 0x4>, <0 233 0x4>;
84 ranges = <0x81000000 0 0 0x03000 0 0x00010000
85 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
91 interrupt-map-mask = <0 0 0 7>;
92 interrupt-map = <0 0 0 1 &pcie_intc 1>,
93 <0 0 0 2 &pcie_intc 2>,
94 <0 0 0 3 &pcie_intc 3>,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dintel,ixp4xx-compact-flash.yaml48 reg = <0xc4000000 0x1000>;
52 ranges = <0 0x0 0x50000000 0x01000000>, <1 0x0 0x51000000 0x01000000>;
53 dma-ranges = <0 0x0 0x50000000 0x01000000>, <1 0x0 0x51000000 0x01000000>;
54 ide@1,0 {
56 reg = <1 0x00000000 0x1000>, <1 0x00040000 0x1000>;
/openbmc/linux/Documentation/devicetree/bindings/virtio/
H A Dpci-iommu.yaml40 BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be
63 reg = <0x0 0x40000000 0x0 0x1000000>;
64 ranges = <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x0f000000>;
70 iommu-map = <0x0 &iommu0 0x0 0x8
71 0x9 &iommu0 0x9 0xfff7>;
74 iommu0: iommu@1,0 {
76 reg = <0x800 0 0 0 0>;
85 reg = <0x0 0x50000000 0x0 0x1000000>;
86 ranges = <0x02000000 0x0 0x51000000 0x0 0x51000000 0x0 0x0f000000>;
90 * with endpoint IDs 0x10000 - 0x1ffff
[all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dintel,ixp4xx-expansion-bus-controller.yaml19 pattern: '^bus@[0-9a-f]+$'
55 "^.*@[0-7],[0-9a-f]+$":
78 reg = <0xc4000000 0x28>;
82 ranges = <0 0x0 0x50000000 0x01000000>,
83 <1 0x0 0x51000000 0x01000000>;
84 dma-ranges = <0 0x0 0x50000000 0x01000000>,
85 <1 0x0 0x51000000 0x01000000>;
86 flash@0,0 {
89 reg = <0 0x00000000 0x1000000>;
91 intel,ixp4xx-eb-cycle-type = <0>;
[all …]
/openbmc/u-boot/include/configs/
H A Dtrats2.h20 #define CONFIG_SYS_PL310_BASE 0x10502000
24 #define CONFIG_SYS_SDRAM_BASE 0x40000000
29 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
30 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
37 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
44 #define CONFIG_SYS_MONITOR_BASE 0x00000000
69 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
72 "u-boot raw 0x80 0x800;" \
73 "/uImage ext4 0 2;" \
74 "/modem.bin ext4 0 2;" \
[all …]
H A Dexynos7420-common.h40 #define CONFIG_IRAM_BASE 0x02100000
41 #define CONFIG_IRAM_SIZE 0x58000
47 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
71 func(MMC, mmc, 0) \
75 "bootm_size=0x10000000\0" \
76 "kernel_addr_r=0x42000000\0" \
77 "fdt_addr_r=0x43000000\0" \
78 "ramdisk_addr_r=0x43300000\0" \
79 "scriptaddr=0x50000000\0" \
80 "pxefile_addr_r=0x51000000\0"
[all …]
H A Dexynos5-common.h22 #define CONFIG_TRACE_EARLY_ADDR 0x50000000
29 #define S5P_CHECK_SLEEP 0x00000BAD
30 #define S5P_CHECK_DIDLE 0xBAD00000
31 #define S5P_CHECK_LPA 0xABAD0000
34 #define INFORM0_OFFSET 0x800
35 #define INFORM1_OFFSET 0x804
36 #define INFORM2_OFFSET 0x808
37 #define INFORM3_OFFSET 0x80c
40 #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000
46 #define COPY_BL2_FNPTR_ADDR 0x02020030
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp4xx.dtsi19 * windows in the 256MB space from 0x50000000 to 0x5fffffff.
26 ranges = <0 0x0 0x50000000 0x01000000>,
27 <1 0x0 0x51000000 0x01000000>,
28 <2 0x0 0x52000000 0x01000000>,
29 <3 0x0 0x53000000 0x01000000>,
30 <4 0x0 0x54000000 0x01000000>,
31 <5 0x0 0x55000000 0x01000000>,
32 <6 0x0 0x56000000 0x01000000>,
33 <7 0x0 0x57000000 0x01000000>;
34 dma-ranges = <0 0x0 0x50000000 0x01000000>,
[all …]
/openbmc/linux/arch/arm/configs/
H A Ds3c6400_defconfig9 CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_siz…
/openbmc/linux/Documentation/devicetree/bindings/firmware/
H A Darm,scmi.yaml20 and Management Interface Platform Design Document")[0] provide for OSPM in
23 [0] https://developer.arm.com/documentation/den0056/latest
107 const: 0
115 default: 0
133 const: 0x11
147 const: 0x13
161 const: 0x14
175 const: 0x15
189 const: 0x16
203 const: 0x17
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,rzn1-pinctrl.yaml90 $ref: "#/additionalProperties/anyOf/0"
94 $ref: "#/additionalProperties/anyOf/0"
102 reg = <0x40067000 0x1000>, <0x51000000 0x480>;
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddra7.dtsi61 reg = <0x0 0x48211000 0x0 0x1000>,
62 <0x0 0x48212000 0x0 0x2000>,
63 <0x0 0x48214000 0x0 0x2000>,
64 <0x0 0x48216000 0x0 0x2000>;
73 reg = <0x0 0x48281000 0x0 0x1000>;
79 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0>;
109 opp-supported-hw = <0xFF 0x01>;
119 opp-supported-hw = <0xFF 0x02>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Ddra7.dtsi59 reg = <0x0 0x48211000 0x0 0x1000>,
60 <0x0 0x48212000 0x0 0x2000>,
61 <0x0 0x48214000 0x0 0x2000>,
62 <0x0 0x48216000 0x0 0x2000>;
71 reg = <0x0 0x48281000 0x0 0x1000>;
77 #size-cells = <0>;
79 cpu0: cpu@0 {
82 reg = <0>;
92 cooling-min-level = <0>;
105 opp-supported-hw = <0xFF 0x01>;
[all …]
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr9a06g032.dtsi19 #size-cells = <0>;
21 cpu@0 {
24 reg = <0>;
34 cpu-release-addr = <0 0x4000c204>;
39 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
51 #clock-cells = <0>;
53 clock-frequency = <0>;
57 #clock-cells = <0>;
[all …]
/openbmc/linux/drivers/video/fbdev/via/
H A Daccel.c19 gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc; in viafb_set_bpp()
35 return 0; in viafb_set_bpp()
44 u32 ge_cmd = 0, tmp, i; in hw_bitblt_1()
54 ge_cmd |= 0x00008000; in hw_bitblt_1()
59 ge_cmd |= 0x00004000; in hw_bitblt_1()
67 case 0x00: /* blackness */ in hw_bitblt_1()
68 case 0x5A: /* pattern inversion */ in hw_bitblt_1()
69 case 0xF0: /* pattern copy */ in hw_bitblt_1()
70 case 0xFF: /* whiteness */ in hw_bitblt_1()
84 if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000) in hw_bitblt_1()
[all …]
/openbmc/linux/arch/arm64/include/asm/
H A Dinsn.h18 AARCH64_INSN_HINT_NOP = 0x0 << 5,
19 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
20 AARCH64_INSN_HINT_WFE = 0x2 << 5,
21 AARCH64_INSN_HINT_WFI = 0x3 << 5,
22 AARCH64_INSN_HINT_SEV = 0x4 << 5,
23 AARCH64_INSN_HINT_SEVL = 0x5 << 5,
25 AARCH64_INSN_HINT_XPACLRI = 0x07 << 5,
26 AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5,
27 AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5,
28 AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5,
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210-aries.dtsi27 reg = <0x30000000 0x05000000>,
28 <0x40000000 0x10000000>,
29 <0x50000000 0x08000000>;
40 reg = <0x43000000 0x2000000>;
46 reg = <0x51000000 0x2000000>;
50 pmic_ap_clk: clock-0 {
53 #clock-cells = <0>;
59 #sound-dai-cells = <0>;
62 vibrator_pwr: regulator-fixed-0 {
69 pinctrl-0 = <&vibrator_ena>;
[all …]
/openbmc/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/openbmc/u-boot/drivers/misc/
H A Ddp_mcu_firmware.h6 0xa0000080, 0xa0000080, 0xa0000080, 0xa00029a8,
7 0xa0002a08, 0xa0002a68, 0xa0000080, 0xa0000080,
8 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
9 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
10 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
11 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
12 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
13 0xa0000080, 0xa0000080, 0xa0000080, 0xa0000080,
14 0x2a801e6e, 0x5694b000, 0x29201800, 0x55290000,
15 0x54c00104, 0x54e00000, 0x05093800, 0xdc080000,
[all …]
/openbmc/linux/drivers/bus/
H A Dti-sysc.c30 #define DIS_SGX BIT(0)
167 writew_relaxed(value & 0xffff, ddata->module_va + offset); in sysc_write()
170 if (ddata->offsets[SYSC_REVISION] >= 0 && in sysc_write()
191 if (ddata->offsets[SYSC_REVISION] >= 0 && in sysc_read()
213 if (offset < 0) in sysc_read_revision()
214 return 0; in sysc_read_revision()
223 if (offset < 0) in sysc_read_sysconfig()
224 return 0; in sysc_read_sysconfig()
233 if (offset < 0) in sysc_read_sysstatus()
234 return 0; in sysc_read_sysstatus()
[all …]
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc20 QEMU_BUILD_BUG_ON(TCG_TYPE_I32 != 0 || TCG_TYPE_I64 != 1);
71 tcg_debug_assert(slot >= 0 && slot <= 1);
87 if (offset == sextract64(offset, 0, 26)) {
90 *src_rw = deposit32(*src_rw, 0, 26, offset);
101 if (offset == sextract64(offset, 0, 19)) {
113 if (offset == sextract64(offset, 0, 14)) {
123 tcg_debug_assert(addend == 0);
137 #define TCG_CT_CONST_AIMM 0x100
138 #define TCG_CT_CONST_LIMM 0x200
139 #define TCG_CT_CONST_ZERO 0x400
[all …]
/openbmc/linux/drivers/scsi/lpfc/
H A Dlpfc_hw.h23 #define FDMI_DID 0xfffffaU
24 #define NameServer_DID 0xfffffcU
25 #define Fabric_Cntl_DID 0xfffffdU
26 #define Fabric_DID 0xfffffeU
27 #define Bcast_DID 0xffffffU
28 #define Mask_DID 0xffffffU
29 #define CT_DID_MASK 0xffff00U
30 #define Fabric_DID_MASK 0xfff000U
31 #define WELL_KNOWN_DID_MASK 0xfffff0U
42 0 */
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]