| /openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
| H A D | ti,k3-r5f-rproc.yaml | 72 It should be either a value of 1 (LockStep mode) or 0 (Split mode) on
76 It should be either a value of 0 (Split mode) or 2 (Single-CPU mode) and
103 either of them can be configured to appear at that R5F's address 0x0.
177 enum: [0, 1]
181 either a value of 1 (enabled) or 0 (disabled), default is disabled
186 enum: [0, 1]
190 either a value of 1 (enabled) or 0 (disabled), default is enabled if
195 enum: [0, 1]
198 address 0 (from core's view). Should be either a value of 1 (ATCM
199 at 0x0) or 0 (BTCM at 0x0), default value is 1 if omitted.
[all …]
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| /openbmc/u-boot/board/altera/cyclone5-socdk/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00020080,
22 0x08020000,
23 0x08000000,
24 0x00018020,
[all …]
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| /openbmc/linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am65.dtsi | 54 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
57 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
58 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
59 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
60 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
62 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
63 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
64 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
[all …]
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| H A D | k3-j721s2.dtsi | 29 #size-cells = <0>;
42 cpu0: cpu@0 {
44 reg = <0x000>;
47 i-cache-size = <0xc000>;
50 d-cache-size = <0x8000>;
58 reg = <0x001>;
61 i-cache-size = <0xc000>;
64 d-cache-size = <0x8000>;
75 cache-size = <0x100000>;
118 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
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| H A D | k3-j7200.dtsi | 25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xc000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xc000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
113 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
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| H A D | k3-j721e.dtsi | 25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xC000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xC000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
114 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
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| H A D | k3-j784s4.dtsi | 26 #size-cells = <0>;
65 cpu0: cpu@0 {
67 reg = <0x000>;
70 i-cache-size = <0xc000>;
73 d-cache-size = <0x8000>;
81 reg = <0x001>;
84 i-cache-size = <0xc000>;
87 d-cache-size = <0x8000>;
95 reg = <0x002>;
98 i-cache-size = <0xc000>;
[all …]
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| /openbmc/u-boot/board/altera/arria5-socdk/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000000,
19 0x00000000,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000060,
24 0x00018060,
[all …]
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| /openbmc/u-boot/include/configs/ |
| H A D | astro_mcf5373l.h | 28 #define ASTRO_ID 0xF8
30 #define ASTRO_ID 0xFA
32 #define ASTRO_ID 0xF9
34 #define ASTRO_ID 0xFC
36 #define ASTRO_ID 0xFB
50 #define ENABLE_JFFS 0
66 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
67 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
79 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
80 #define CONFIG_SYS_CORE_SRAM 0x80000000
[all …]
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| H A D | ts4600.h | 19 #define PHYS_SDRAM_1 0x40000000 /* Base address */
20 #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
29 #define CONFIG_SYS_MMC_ENV_DEV 0
33 #define CONFIG_LOADADDR 0x42000000
38 "fdt_addr=0x41000000\0" \
39 "loadkernel=load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage\0" \
40 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} imx28-ts4600.dtb\0" \
41 "loadbootscript=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot.ub\0" \
43 "setenv mmcdev 0; " \
45 "run loadbootscript && source ${loadaddr}; \0" \
[all …]
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| H A D | apx4devkit.h | 20 #define PHYS_SDRAM_1 0x40000000 /* Base address */
21 #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
31 #define CONFIG_SYS_MMC_ENV_DEV 0
40 #define CONFIG_ENV_OFFSET 0x120000
51 #define CONFIG_FEC_MXC_PHYADDR 0
64 #define CONFIG_LOADADDR 0x41000000
71 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
72 "verify=no\0" \
73 "bootcmd=run bootcmd_nand\0" \
74 "kernelargs=console=tty0 console=ttyAMA0,115200 consoleblank=0\0" \
[all …]
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| /openbmc/u-boot/board/samtec/vining_fpga/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
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| /openbmc/u-boot/board/devboards/dbm-soc1/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00004824,
22 0x01209000,
23 0x82400000,
24 0x00018004,
[all …]
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| /openbmc/u-boot/board/terasic/sockit/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
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| /openbmc/u-boot/board/terasic/de10-nano/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00020080,
22 0x18060000,
23 0x08000000,
24 0x00018020,
[all …]
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| /openbmc/u-boot/board/terasic/de0-nano-soc/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00020080,
22 0x18060000,
23 0x08000000,
24 0x00018020,
[all …]
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| /openbmc/u-boot/board/ebv/socrates/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00004824,
22 0x01209000,
23 0x82400000,
24 0x00018004,
[all …]
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| /openbmc/u-boot/board/sr1500/qts/ |
| H A D | iocsr_config.h | 15 0x00100000,
16 0x40000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x000E0180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
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| /openbmc/u-boot/board/terasic/de1-soc/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/virtio/ |
| H A D | pci-iommu.yaml | 40 BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be
63 reg = <0x0 0x40000000 0x0 0x1000000>;
64 ranges = <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x0f000000>;
70 iommu-map = <0x0 &iommu0 0x0 0x8
71 0x9 &iommu0 0x9 0xfff7>;
74 iommu0: iommu@1,0 {
76 reg = <0x800 0 0 0 0>;
85 reg = <0x0 0x50000000 0x0 0x1000000>;
86 ranges = <0x02000000 0x0 0x51000000 0x0 0x51000000 0x0 0x0f000000>;
90 * with endpoint IDs 0x10000 - 0x1ffff
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/pci/ |
| H A D | host-generic-pci.yaml | 94 property. If no "bus-range" is specified, this will be bus 0 (the
156 bus-range = <0x0 0x1>;
159 reg = <0x0 0x40000000 0x0 0x1000000>;
162 ranges = <0x01000000 0x0 0x01000000 0x0 0x01000000 0x0 0x00010000>,
163 <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x3f000000>;
165 #interrupt-cells = <0x1>;
168 interrupt-map = < 0x0 0x0 0x0 0x1 &gic 0x0 0x4 0x1>,
169 < 0x800 0x0 0x0 0x1 &gic 0x0 0x5 0x1>,
170 <0x1000 0x0 0x0 0x1 &gic 0x0 0x6 0x1>,
171 <0x1800 0x0 0x0 0x1 &gic 0x0 0x7 0x1>;
[all …]
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| H A D | cdns,cdns-pcie-host.yaml | 47 bus-range = <0x0 0xff>;
48 linux,pci-domain = <0>;
49 vendor-id = <0x17cd>;
50 device-id = <0x0200>;
52 reg = <0x0 0xfb000000 0x0 0x01000000>,
53 <0x0 0x41000000 0x0 0x00001000>;
56 ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
57 <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
58 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
60 #interrupt-cells = <0x1>;
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | mrvl,pxa-ssp.txt | 22 reg = <0x41000000 0x40>;
24 clock-names = "pxa27x-ssp.0";
29 ssp_dai0: ssp_dai@0 {
32 #sound-dai-cells = <0>;
|
| /openbmc/linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | faraday,ftwdt010.yaml | 56 reg = <0x41000000 0x1000>;
63 reg = <0x98500000 0x10>;
|
| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | mrvl,pxa-ssp.txt | 23 reg = <0x41000000 0x40>;
26 clock-names = "pxa27x-ssp.0";
34 reg = <0x41700000 0x40>;
45 reg = <0x41900000 0x40>;
47 interrupts = <0>;
56 reg = <0x41a00000 0x40>;
|