Home
last modified time | relevance | path

Searched +full:0 +full:x3ff01400 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/mips/boot/dts/loongson/
H A Dloongson64g-package.dtsi10 #address-cells = <0>;
20 ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
21 0 0x3ff00000 0 0x3ff00000 0x100000
22 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>;
26 reg = <0 0x3ff01400 0x64>;
35 loongson,parent_int_map = <0x00ffffff>, /* int0 */
36 <0xff000000>, /* int1 */
37 <0x00000000>, /* int2 */
38 <0x00000000>; /* int3 */
44 reg = <0 0x1fe00100 0x10>;
[all …]
H A Dloongson64c-package.dtsi10 #address-cells = <0>;
20 ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
21 0 0x3ff00000 0 0x3ff00000 0x100000
23 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000
25 0x1efd 0xfb000000 0x1efd 0xfb000000 0x10000000>;
29 reg = <0 0x3ff01400 0x64>;
38 loongson,parent_int_map = <0xf0ffffff>, /* int0 */
39 <0x0f000000>, /* int1 */
40 <0x00000000>, /* int2 */
41 <0x00000000>; /* int3 */
[all …]
H A Dloongson64v_4core_virtio.dts12 #address-cells = <0>;
22 ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
23 0 0x3ff00000 0 0x3ff00000 0x100000
24 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>;
28 reg = <0 0x3ff01400 0x64>;
37 loongson,parent_int_map = <0x00000001>, /* int0 */
38 <0xfffffffe>, /* int1 */
39 <0x00000000>, /* int2 */
40 <0x00000000>; /* int3 */
46 reg = <0 0x1fe001e0 0x8>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dloongson,liointc.yaml60 interrupt lines. Each cell refers to a parent interrupt line from 0 to 3
61 and each bit in the cell refers to a child interrupt from 0 to 31.
103 reg = <0x3ff01400 0x64>;
112 loongson,parent_int_map = <0xf0ffffff>, /* int0 */
113 <0x0f000000>, /* int1 */
114 <0x00000000>, /* int2 */
115 <0x00000000>; /* int3 */
/openbmc/qemu/hw/mips/
H A Dloongson3_virt.c54 #define PM_CNTL_MODE 0x10
65 #define UART_IRQ 0
70 [VIRT_LOWMEM] = { 0x00000000, 0x10000000 },
71 [VIRT_PM] = { 0x10080000, 0x100 },
72 [VIRT_FW_CFG] = { 0x10080100, 0x100 },
73 [VIRT_RTC] = { 0x10081000, 0x1000 },
74 [VIRT_PCIE_PIO] = { 0x18000000, 0x80000 },
75 [VIRT_PCIE_ECAM] = { 0x1a000000, 0x2000000 },
76 [VIRT_BIOS_ROM] = { 0x1fc00000, 0x200000 },
77 [VIRT_UART] = { 0x1fe001e0, 0x8 },
[all …]