| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | sa8540p-ride.dts | 34 regulators-0 {
163 pinctrl-0 = <ðernet0_default>;
170 #size-cells = <0>;
174 compatible = "ethernet-phy-id0141.0dd4";
175 reg = <0x8>;
189 /* Set MODE[2:0] to RGMII_SGMII */
190 <0x12 0x14 0xfff8 0x4>,
191 /* Soft reset required after changing MODE[2:0] */
192 <0x12 0x14 0x7fff 0x8000>;
202 snps,map-to-dma-channel = <0x0>;
[all …]
|
| H A D | sa8775p-ride.dtsi | 33 regulators-0 {
266 pinctrl-0 = <ðernet0_default>;
278 #size-cells = <0>;
287 snps,map-to-dma-channel = <0x0>;
289 snps,priority = <0x1>;
294 snps,map-to-dma-channel = <0x1>;
300 snps,map-to-dma-channel = <0x2>;
306 snps,map-to-dma-channel = <0x3>;
307 snps,priority = <0xc>;
325 snps,send_slope = <0x1000>;
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | snps,dwmac.yaml | 211 "^queue[0-9]$":
362 "^queue[0-9]$":
376 Queue 0 is reserved for legacy traffic and so no AVB is
674 reg = <0xe0800000 0x8000>;
692 snps,wr_osr_lmt = <0xf>;
693 snps,rd_osr_lmt = <0xf>;
694 snps,blen = <256 128 64 32 0 0 0>;
702 snps,map-to-dma-channel = <0x0>;
703 snps,priority = <0x0>;
711 snps,weight = <0x10>;
[all …]
|
| /openbmc/linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_dump.h | 22 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
23 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
24 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
25 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
45 #define BNX2X_DUMP_VERSION 0x61111111
65 static const u32 page_vals_e2[] = {0, 128};
68 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
74 static const u32 page_vals_e3[] = {0, 128};
77 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
81 { 0x2000, 1, 0x1f, 0xfff},
[all …]
|
| /openbmc/qemu/target/xtensa/core-lx106/ |
| H A D | xtensa-modules.c.inc | 31 { "MMID", 89, 0 },
32 { "DDR", 104, 0 },
33 { "176", 176, 0 },
34 { "208", 208, 0 },
35 { "INTERRUPT", 226, 0 },
36 { "INTCLEAR", 227, 0 },
37 { "CCOUNT", 234, 0 },
38 { "PRID", 235, 0 },
39 { "ICOUNT", 236, 0 },
40 { "CCOMPARE0", 240, 0 },
[all …]
|
| /openbmc/qemu/target/xtensa/core-sample_controller/ |
| H A D | xtensa-modules.c.inc | 32 { "MMID", 89, 0 },
33 { "DDR", 104, 0 },
34 { "CONFIGID0", 176, 0 },
35 { "CONFIGID1", 208, 0 },
36 { "INTERRUPT", 226, 0 },
37 { "INTCLEAR", 227, 0 },
38 { "CCOUNT", 234, 0 },
39 { "PRID", 235, 0 },
40 { "ICOUNT", 236, 0 },
41 { "CCOMPARE0", 240, 0 },
[all …]
|
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_11_0_3_offset.h | 29 // base address: 0x4980
30 …SDMA0_DEC_START 0x0000
31 …e regSDMA0_DEC_START_BASE_IDX 0
32 …SDMA0_F32_MISC_CNTL 0x000b
33 …e regSDMA0_F32_MISC_CNTL_BASE_IDX 0
34 …SDMA0_GLOBAL_TIMESTAMP_LO 0x000f
35 …e regSDMA0_GLOBAL_TIMESTAMP_LO_BASE_IDX 0
36 …SDMA0_GLOBAL_TIMESTAMP_HI 0x0010
37 …e regSDMA0_GLOBAL_TIMESTAMP_HI_BASE_IDX 0
38 …SDMA0_POWER_CNTL 0x001a
[all …]
|
| /openbmc/qemu/target/xtensa/core-dc233c/ |
| H A D | xtensa-modules.c.inc | 3 Customer ID=4869; Build=0x2cfec; Copyright (c) 2003-2010 Tensilica Inc.
32 { "LBEG", 0, 0 },
33 { "LEND", 1, 0 },
34 { "LCOUNT", 2, 0 },
35 { "ACCLO", 16, 0 },
36 { "ACCHI", 17, 0 },
37 { "M0", 32, 0 },
38 { "M1", 33, 0 },
39 { "M2", 34, 0 },
40 { "M3", 35, 0 },
[all …]
|
| /openbmc/qemu/target/xtensa/core-de212/ |
| H A D | xtensa-modules.c.inc | 32 { "LBEG", 0, 0 },
33 { "LEND", 1, 0 },
34 { "LCOUNT", 2, 0 },
35 { "ACCLO", 16, 0 },
36 { "ACCHI", 17, 0 },
37 { "M0", 32, 0 },
38 { "M1", 33, 0 },
39 { "M2", 34, 0 },
40 { "M3", 35, 0 },
41 { "MMID", 89, 0 },
[all …]
|
| /openbmc/qemu/target/xtensa/core-dc232b/ |
| H A D | xtensa-modules.c.inc | 29 { "LBEG", 0, 0 },
30 { "LEND", 1, 0 },
31 { "LCOUNT", 2, 0 },
32 { "ACCLO", 16, 0 },
33 { "ACCHI", 17, 0 },
34 { "M0", 32, 0 },
35 { "M1", 33, 0 },
36 { "M2", 34, 0 },
37 { "M3", 35, 0 },
38 { "PTEVADDR", 83, 0 },
[all …]
|
| /openbmc/qemu/target/xtensa/core-de233_fpu/ |
| H A D | xtensa-modules.c.inc | 31 { "LBEG", 0, 0 },
32 { "LEND", 1, 0 },
33 { "LCOUNT", 2, 0 },
34 { "BR", 4, 0 },
35 { "ACCLO", 16, 0 },
36 { "ACCHI", 17, 0 },
37 { "M0", 32, 0 },
38 { "M1", 33, 0 },
39 { "M2", 34, 0 },
40 { "M3", 35, 0 },
[all …]
|
| /openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/ |
| H A D | xtensa-modules.c.inc | 31 { "LBEG", 0, 0 },
32 { "LEND", 1, 0 },
33 { "LCOUNT", 2, 0 },
34 { "BR", 4, 0 },
35 { "PTEVADDR", 83, 0 },
36 { "DDR", 104, 0 },
37 { "CONFIGID0", 176, 0 },
38 { "CONFIGID1", 208, 0 },
39 { "INTERRUPT", 226, 0 },
40 { "INTCLEAR", 227, 0 },
[all …]
|
| /openbmc/qemu/target/xtensa/core-dsp3400/ |
| H A D | xtensa-modules.c.inc | 31 { "LBEG", 0, 0 },
32 { "LEND", 1, 0 },
33 { "LCOUNT", 2, 0 },
34 { "BR", 4, 0 },
35 { "MMID", 89, 0 },
36 { "DDR", 104, 0 },
37 { "176", 176, 0 },
38 { "208", 208, 0 },
39 { "INTERRUPT", 226, 0 },
40 { "INTCLEAR", 227, 0 },
[all …]
|