Searched +full:0 +full:x35010000 (Results 1 – 4 of 4) sorted by relevance
8 #define BSC1_BASE_ADDR 0x3e0160009 #define BSC2_BASE_ADDR 0x3e01700010 #define BSC3_BASE_ADDR 0x3e01800011 #define DWDMA_AHB_BASE_ADDR 0x3810000012 #define ESUB_CLK_BASE_ADDR 0x3800000013 #define ESW_CONTRL_BASE_ADDR 0x3820000014 #define GPIO2_BASE_ADDR 0x3500300015 #define HSOTG_BASE_ADDR 0x3f12000016 #define HSOTG_CTRL_BASE_ADDR 0x3f13000017 #define KONA_MST_CLK_BASE_ADDR 0x3f001000[all …]
61 reg = <0x35010000 0x4000>;63 interrupts = <0 627 4>;66 #size-cells = <0>;
23 #size-cells = <0>;57 cpu_e0: cpu@0 {60 reg = <0x0 0x0>;62 cpu-release-addr = <0 0>; /* To be filled by loader */67 i-cache-size = <0x20000>;68 d-cache-size = <0x10000>;74 reg = <0x0 0x1>;76 cpu-release-addr = <0 0>; /* To be filled by loader */81 i-cache-size = <0x20000>;82 d-cache-size = <0x10000>;[all …]
24 #size-cells = <0>;58 cpu_e0: cpu@0 {61 reg = <0x0 0x0>;63 cpu-release-addr = <0 0>; /* To be filled by loader */68 i-cache-size = <0x20000>;69 d-cache-size = <0x10000>;75 reg = <0x0 0x1>;77 cpu-release-addr = <0 0>; /* To be filled by loader */82 i-cache-size = <0x20000>;83 d-cache-size = <0x10000>;[all …]