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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8-isi.yaml85 port@0:
88 - port@0
101 port@0:
102 description: MIPI CSI-2 RX 0
106 - port@0
120 reg = <0x32e20000 0x100>;
130 #size-cells = <0>;
132 port@0 {
133 reg = <0>;
148 reg = <0x32e00000 0x4000>;
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dimx-regs.h11 #define ROM_VERSION_A0 0x800
12 #define ROM_VERSION_B0 0x83C
14 #define M4_BOOTROM_BASE_ADDR 0x007E0000
16 #define SAI1_BASE_ADDR 0x30010000
17 #define SAI6_BASE_ADDR 0x30030000
18 #define SAI5_BASE_ADDR 0x30040000
19 #define SAI4_BASE_ADDR 0x30050000
20 #define SPBA2_BASE_ADDR 0x300F0000
21 #define AIPS1_BASE_ADDR 0x301F0000
22 #define GPIO1_BASE_ADDR 0X30200000
[all …]
/openbmc/qemu/hw/arm/
H A Dfsl-imx8mp.c29 [FSL_IMX8MP_DDR_PHY_BROADCAST] = { 0x3dc00000, 4 * MiB, "ddr_phy_broadcast" },
30 [FSL_IMX8MP_DDR_PERF_MON] = { 0x3d800000, 4 * MiB, "ddr_perf_mon" },
31 [FSL_IMX8MP_DDR_CTL] = { 0x3d400000, 4 * MiB, "ddr_ctl" },
32 [FSL_IMX8MP_DDR_BLK_CTRL] = { 0x3d000000, 1 * MiB, "ddr_blk_ctrl" },
33 [FSL_IMX8MP_DDR_PHY] = { 0x3c000000, 16 * MiB, "ddr_phy" },
34 [FSL_IMX8MP_AUDIO_DSP] = { 0x3b000000, 16 * MiB, "audio_dsp" },
35 [FSL_IMX8MP_GIC_DIST] = { 0x38800000, 512 * KiB, "gic_dist" },
36 [FSL_IMX8MP_GIC_REDIST] = { 0x38880000, 512 * KiB, "gic_redist" },
37 [FSL_IMX8MP_NPU] = { 0x38500000, 2 * MiB, "npu" },
38 [FSL_IMX8MP_VPU] = { 0x38340000, 2 * MiB, "vpu" },
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi46 #size-cells = <0>;
53 arm,psci-suspend-param = <0x0010033>;
61 A53_0: cpu@0 {
64 reg = <0x0>;
68 i-cache-size = <0x8000>;
71 d-cache-size = <0x8000>;
85 reg = <0x1>;
89 i-cache-size = <0x8000>;
92 d-cache-size = <0x8000>;
104 reg = <0x2>;
[all …]
H A Dimx8mm.dtsi46 #size-cells = <0>;
53 arm,psci-suspend-param = <0x0010033>;
61 A53_0: cpu@0 {
64 reg = <0x0>;
68 i-cache-size = <0x8000>;
71 d-cache-size = <0x8000>;
85 reg = <0x1>;
89 i-cache-size = <0x8000>;
92 d-cache-size = <0x8000>;
104 reg = <0x2>;
[all …]